IMP38C/HC/42/3/4/5
Application Information
The IMP38C and IMP38HC devices are compatible with generic
384x PWM devices. The following discussion highlights the dif-
ferences and advantages of the IMP ‘C’ and ‘HC’ designs.
Transient Protection
Good high-frequency layout practices should be followed. Avoid
long printed-circuit traces and component leads. Locate oscillator
and compensation components near the IC. Avoid capacitive and
inductive coupling of the switching waveform into the
high-impedance inputs of the error amplifier, oscillator, and
current-sense amplifier. VREF and VCC stability will be aided by
using high-frequency decoupling capacitors.
Start-up Current
IMP’s BiCMOS process allows for substantial reduction in the
start-up current. Typical start-up current is 95µA, with a maxi-
mum limit of 120µA. Low start-up current allows high resistance,
lower-wattage, start-up resistors to supply controller start-up
power.
Undervoltage Lockout
Several different thresholds are available.
Operating Current
Undervoltage Lockout Thresholds
Operating current has been reduced to 1.5mA maximum.
Compared to the 11mA needed for a typical bipolar controller and
6mA for competitive BiCMOS controllers, IMP's low operating
current allows the controller to run cooler and with better effi-
ciency. In addition, the VCC hold-up capacitance (used during
start-up) can be reduced.
Start-up at 8.4V
Operating Minimum = 7.6V
Start-up at 14.5V
Operating Minimum = 9.0V
IMP38C43/HC43
IMP38C45/HC45
IMP38C42/HC42
IMP38C44/HC44
38C/HC_t04.eps
Under-voltage lockout (UVL) performance has been improved.
When the power supply voltage is below the startup voltage,
internal circuitry puts the output into a low impedance state and
sets the output to zero. The output will sink up to 20mA in this
controlled state and remain below 1.3V, well below the turn-on
threshold voltage of the external MOSFET.
Output Driver
The IMP38HC4x/38C4x CMOS output stage drives external
power MOSFETs to the full supply voltage. Low ON-resistance
and high peak current drive combine to give greater than 1000pF
gate capacitance drive capability. Rise and fall time requirements
may dictate the appropriate value of output capacitance. Within
the restrictions of output capacity and controller power dissipa-
tion, switching frequencies can exceed 1MHz.
With the IMP38C/HC4x output stage design, leakage current
from the external power MOSFETs will not force the PWM output
to rise and turn the external MOSFET on.
The CMOS output stage “break-before-make” action is guaran-
teed by design and insures that no cross-conduction current will
flow. This minimizes heat dissipation, increases efficiency and
enhances reliability.
Even when VDD drops to zero volts, the OUT pin will not rise
above approximately 1.3V because the UVLO circuit is powered
through the OUT pin.
The IMP output stage performance in UVL mode, while sinking
20mA, is shown in Figure 2.
Oscillator Operation
Two external components, RT and CT, set the switching frequency.
With VCC = 14V, RT = 10k and CT = 3.3nF, nominal switching
frequency is 50kHz.
VOUT While Sinking 20mA
2.0
IMP38C/HC4x
VREF
1.5
1.0
0.5
0
IMP38C4x
RT
IMP38HC4x
RT/CT
1.73
frequency Hz =
[
]
RT Ω × CT F
[
]
[ ]
CT
GND
38C/HC_07.eps
0
1
2
3
4
5
6
7
8
9
VDD (V)
38C/HC_05b.eps
Figure 1. Oscillator Component Selection
Figure 2. Output Stage Performance in UVL Mode
!S
6
408-432-9100/www.impweb.com
© 2000 IMP, Inc.
IMP [ IMP, INC ]
