Ei68C681
Ei88C681
DUAL UART
Semiconductor, Inc.
The DUART provides a flow control capability to inhibit
transmission from a remote device when the buffer of
the receiving DUART is full, thus preventing loss of
data. The DUART also provides a general purpose 16-
bit counter/timer (which may also be used as a
programmable bit rate generator), a multipurpose input
port and a multipurpose output port.
These ports can be used as general purpose I/O ports
or can be assigned specific functions such as clock
inputs or status/interrupt outputs under program control.
The Ei68C681 are fabricated using Epic’s advanced
CMOS process to provide high performance and low
power consumption.
BLOCK DIAGRAM
8
D0-D7
BUS BUFFER
CHANNEL
OPERATION
CONTROL
TRANSMIT
TxDA
R/W•
LOGIC
ADDRESS
DECODE
DTACK•
RECEIVE
RxDA
CE•
A0-A3
LOGIC
R/W CONTROL
4
RESET•
INTERRUPT
CONTROL
INTR•
IACK•
TxDB
CHANNEL B
IMR
ISR
IVR
(AS ABOVE)
RxDB
INPUT PORT
6
IP0-IP6
IPCR
ACR
X1/CLK
X2
TIMING
AND
OUTPUT PORT
8
CONTROL
LOGIC
OPCR
OPR
VCC
GND
14
IMP [ IMP, INC ]
