TECHNICAL DATA
IN74HCT109A
Dual J-K Flip-Flop
with set and Reset
High-Performance Silicon-Gate CMOS
The IN74HCT109A is identical in pinout to the LS/ALS109. The
IN74HCT109A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
This device consists of two J-K flip-flops with individual set, reset, and
clock inputs. Changes at the inputs are reflected at the outputs with the next
low-to-high transition of the clock. Both Q to Q outputs are available from
each flip-flop.
ORDERING INFORMATION
IN74HCT109AN Plastic
IN74HCT109AD SOIC
TA = -55° to 125° C for all packages.
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•
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TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 µA
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Clock
Output
Set Reset
J
K
X
X
X
L
Q
Q
L
L
H
L
H
L
X
X
X
X
X
X
L
H
L
H
L
H*
H*
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
Toggle
No Change
H
H
X
H
X
H
L
PIN 16=VCC
L
No Change
PIN 8 = GND
X = Don’t care
*Both outputs will remain high as long as Set and
Reset are low., but the output states are
unpredictable if Set and Reset go high
simultaneously.
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
