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IN74HC595AN 参数 Datasheet PDF下载

IN74HC595AN图片预览
型号: IN74HC595AN
PDF下载: 下载PDF文件 查看货源
内容描述: 8位串行输入/串行或并行输出移位锁存具有三态输出的高性能硅栅CMOS注册 [8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs High-Performance Silicon-Gate CMOS]
分类和应用:
文件页数/大小: 10 页 / 200 K
品牌: IKSEMICON [ IK SEMICON CO., LTD ]
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IN74HC595A  
FUNCTION TABLE  
Inputs  
Resulting Function  
Operation  
Reset Serial Shift Latch Output  
Input Clock Clock Enable  
A
Shift  
Register  
Contents  
Latch  
Register  
Contents  
Serial  
Output  
SQH  
Parallel  
Outputs  
QA-QH  
Reset shift register  
L
X
X
L,H,  
L
L
U
L
U
Shift data into shift  
register  
H
H
H
D
X
X
L,H,  
L
L
L
D
SRA  
SRN SRN+1  
U
U
SRG SRH  
U
U
Shift register remains  
unchanged  
L,H, L,H,  
L,H,  
U
U
U
Transfer shift register  
contents to latch  
register  
U
SRN LRN  
SRN  
Latch register remains  
unchanged  
X
X
X
X
X
X
X
X
X
L,H,  
X
L
L
H
*
*
*
U
*
*
*
U
Enabled  
Z
Enable parallel  
outputs  
**  
**  
Force outputs into  
high-impedance state  
X
SR = shift register contents  
LR = latch register contents  
D = data (L,H) logic level  
U = remains unchanged  
X = don’t care  
Z = high impedance  
* = depends on Reset and Shift Clock inputs  
** = depends on Latch Clock input  
PIN DESCRIPTIONS  
INPUTS:  
A - Serial Data Input. The data on this pin is shifted into the 8-bit serial shift register.  
CONTROL INPUTS:  
Shift Clock - Shift Register Clock Input. A low-to-high transition on this input causes the data at the Serial Input pin to be  
shifted into the 8-bit shift register.  
Reset - Active-low, Asynchronous, Shift Register Reset Input. A low on this pin resets the shift register portion of this  
device only. The 8-bit latch is not affected.  
Latch Clock - Storage Latch Clock Input. A low-to-high transition on this input latches the shift register data.  
Output Enable - Active-Low Output Enable. A low on this input allows the data from the latches to bepresented at the  
outputs. A high on this input forces the outputs (QA-QH) into the high-impedance state. The serial output is not affected by  
this control unit.  
OUTPUTS:  
QA-QH - Noninverted, 3-state, latch outputs.  
SQH - Voninverted, Serial Data Output. This is the output of the eighth stage of the 8-bit shift register. This output does  
not have three-state capability.  
Rev. 00