TECHNICAL DATA
IN74ACT112
Dual J-K Flip-Flop
with Set and Reset
High-Speed Silicon-Gate CMOS
The IN74ACT112 is identical in pinout to the LS/ALS112,
HC/HCT112. The IN74ACT112 may be used as a level converter for
interfacing TTL or NMOS outputs to High Speed CMOS inputs.
Each flip-flop is negative-edge clocked and has active-low
asynchronous Set and Reset inputs.
•
•
•
•
•
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 μA; 0.1 μA @ 25°C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT112N Plastic
IN74ACT112D SOIC
TA = -40° to 85° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Clock
Outputs
Set
L
Reset
H
J
K
X
X
X
L
Q
Q
L
X
X
X
X
X
X
L
H
L
L*
H
L
L
H
L*
L
H
H
H
H
H
H
H
H
No Change
H
L
H
L
L
H
L
H
H
H
X
X
X
H
H
H
X
X
X
Toggle
H
L
No Change
No Change
No Change
H
H
H
* Both outputs will remain low as long as Set and Reset are
low, but the output states are unpredictable if Set and Reset
go high simultaneously
PIN 16=VCC
PIN 8 = GND
X = Don’t Care
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
