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IN16C1054-PL 参数 Datasheet PDF下载

IN16C1054-PL图片预览
型号: IN16C1054-PL
PDF下载: 下载PDF文件 查看货源
内容描述: Quard UART,具有256字节FIFO [Quard Uart with 256-Byte FIFO]
分类和应用: 先进先出芯片
文件页数/大小: 53 页 / 654 K
品牌: IKSEMICON [ IK SEMICON CO., LTD ]
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TECHNICAL DATA  
Quard Uart with 256-Byte FIFO  
IN16C1054  
1. Functional Description  
IN16C1054 is a quad UART(Universal Asynchronous Receiver/Transmitter) with 256-byte FIFO supporting maximum  
communication speed of 5.3Mbps. It offers flow control function by hardware or software and signal lines which can open  
or close the Tx/Rx input/output when communicating by RS-422 or RS-485. It can handle four interrupt signals (INT0,  
INT1, INT2 and INT3) with one global interrupt signal line (GINT) and offers a new ‘Xoff re-transmit’ function in addition to  
Xon any character.  
UART can convert 8-bit parallel data to asynchronous serial data and vice versa. It can transmit 5 to 8-bit letters, program  
I/O interrupt trigger level and has 256-byte I/O data FIFO.  
UART can generate any baud rate using clock and programmable divisor, transmit data with even, odd or no parity and 1,  
1.5, 2 stop bit, and detect break, idle, framing error, FIFO overflow and parity error in input data.  
UART has a software interface for modem controlling.  
IN16C1054 offers TQFP80 and PLCC68 packages.  
2. Features  
4 Channel UART  
3.3V Operation  
Optional Data Flow Additional Halt by Xoff Re-  
transmit Control  
5V Tolerant Inputs  
RS-422 Point to Point/Multi-Drop Control  
RS-485 Echo/Non Echo Control  
Pin-to-pin Compatible with Industry Standard  
SB16C554 with Additional  
Enhancements  
DMA Signaling Capability for Both Received and  
Transmitted Data  
Up to 5.3 Mbps Baud Rate (Up to 85 MHz Oscillator  
Input Clock)  
Software Selectable Baud Rate Generator  
Prescaler Provides Additional Divide-by-4 Function  
Fast Data Bus Access Time  
256-byte Transmit FIFO  
256-byte Receive FIFO with Error Flags  
Industrial Temperature Range (-20 to +85 )  
Programmable and Selectable Transmit and  
Receive FIFO Trigger Levels for DMA  
and Interrupt Generation  
Programmable Sleep Mode  
Programmable Serial Interface Characteristics  
-
-
5, 6, 7, or 8-bit Characters  
Even, Odd, or No Parity Bit Generation and  
Detection  
Software (Xon/Xoff) / Hardware (RTS#/CTS#) Flow  
Control  
-
1, 1.5, or 2 Stop Bit Generation  
False Start Bit Detection  
-
-
Programmable Xon/Xoff Characters  
Line Break Generation and Detection  
Programmable Auto-RTS and Auto-CTS  
Fully Prioritized Interrupt System Controls  
Modem Control Functions (RTS#, CTS#, DTR#,  
DSR#, DCD#, and RI#)  
Global Interrupt Mask/Poll Control  
Optional Data Flow Resume by Xon Any Character  
Control  
Rev. 00