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ILA8362ANS 参数 Datasheet PDF下载

ILA8362ANS图片预览
型号: ILA8362ANS
PDF下载: 下载PDF文件 查看货源
内容描述: 集成了PAL和PAL / NTSC TV处理器 [Integrated PAL and PAL/NTSC TV processor]
分类和应用: 电视
文件页数/大小: 15 页 / 410 K
品牌: IKSEMICON [ IK SEMICON CO., LTD ]
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ILA8362ANS (8A)  
FUNCTIONAL DESCRIPTION  
Video IF amplifier  
Synchronisation circuit  
The IF amplifier contains 3 AC-coupled control stages  
with a total gain control range of greater than 60 dB and  
sensitivity 70 μV.  
The sync separator is proceeded by a voltage controlled  
amplifier which adjusts the sync pulse amplitude to a  
fixed level. The sync pulses are then fed to the slicing  
stage (separator) which operates at 50% of the amplitude.  
The reference carrier for the video demodulator is  
obtained by means of passive regeneration of the picture  
carrier. The external reference tuned circuit is the only  
remaining adjustment of the IC.  
The separated sync pulses are fed to the first phase  
detector and to the coincidence detector. The coincidence  
detector is used for transmitter identification and to detect  
whether the line oscillator is synchronised.  
The polarity of the demodulator can be switched so that  
the circuit is suitable for both positive and negative  
modulated signals.  
The line oscillator operates at twice the line frequency.  
The oscillator network is internal. Because of the spread  
of internal components an automatic adjustment circuit  
has been added to the IC. The circuit compares the  
oscillator frequency with that of the crystal oscillator in  
the colour decoder. This results in a free-running  
frequency which deviates less than 2% from the typical  
value.  
The AFC circuit is driven with the same reference signal  
as the video demodulator. The AFC output voltage is 6 V.  
The AGC detector operates on levels, top sync for  
negative modulated and top white for positive modulated  
signals. The AGC detector time constant capacitor is  
connected externally. This is mainly because of the  
flexibility of the application.  
The circuit employs a second control loop to generate the  
drive pulses for the horizontal driver stage.  
The time constant of the AGC system during positive  
modulation is slow, this is to avoid any visible picture  
variations. This, however, causes the system to react very  
slowly to sudden changes in the input signal amplitude.  
X-ray protection can be realised by switching the pin of  
the second control loop to the positive supply line. The  
detection circuit must be connected externally. When the  
X-ray protection is active the horizontal output voltage is  
switched to a high level. When the voltage on this pin  
returns to its normal level the horizontal output is  
released again.  
To overcome this problem a speed-up circuit has been  
included which detects whether the AGC detector is  
activated every frame period.  
The circuit contains a video identification circuit which is  
independent of the synchronisation circuit. Therefore  
search tuning is possible when the display section of the  
receiver is used as a monitor. In the normal television  
mode the identification output is connected to the  
coincidence detector, this applies to all three devices. The  
identification output voltage is LOW when no transmitter  
is identified. In this condition the sound demodulator is  
switched off (mute function). When a transmitter is  
identified the output voltage is HIGH. The voltage level  
is dependent on the frequency of the incoming  
chrominance signal.  
The IC contains a start-up circuit for the horizontal  
oscillator. When this feature is required a current of  
5.5 mA has to be supplied to pin 36. For an application  
without start-up both supply pins (10 and 36) must be  
connected to the 8 V supply line.  
The drive signal for the vertical ramp generator is  
generated by means of a divider circuit. The RC network  
for the ramp generator is external.  
Integrated video filters  
The circuit contains a chrominance bandpass and trap  
circuit. The filters are realised by means of gyrator  
circuits and are automatically tuned by comparing the  
tuning frequency with the crystal frequency of the  
decoder.  
Sound circuit  
The sound bandpass and trap filters have to be connected  
externally. The filtered intercarrier signal is fed to a  
limiter circuit and is demodulated by means of a PLL  
demodulator. The PLL circuit tunes itself automatically  
to the incoming signal, consequently, no adjustment is  
required.  
When the pin is left open-circuit the trap is switched off  
so that the circuit can also be used for S-VHS  
applications.  
The luminance delay line and the delay for the peaking  
circuit are also realised by means of gyrator circuits.  
Colour decoder  
The colour decoder in the various ICs contains an  
alignment-free crystal oscillator, a colour killer circuit  
and colour difference demodulators. The 90° phase shift  
for the reference signal is achieved internally.  
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