IL6083
Functional Description
Pin 1, Supply Voltage, VS or VBatt
Overvoltage Detection
Stage 1
If overvoltages of VBatt > 20 V (typically) occur, the external transistor is switched off, and switched on again
at VBatt < 18.5 V (hysteresis).
Stage 2
If VBatt > 28.5 V (typically), the voltage limitation of the IC is reduced from VS = 26 V to 20 V. The gate of the
external transistor remains at the potential of the IC ground, thus producing voltage sharing between FET
and lamps in the event of overvoltage pulses (e.g. , load dump). The short - circuit protection is not in
operation.
At VBatt approximately < 23 V, the overvoltage detection stage 2 is switched off. Thus, during overvoltage
detection stage 2, the lamp voltage Vlamp is calculated as follows:
VLamp = VBatt - VS - VGS
VS = supply voltage of the IC at overvoltage detection stage 2
VGS = gate - source voltage of the FET
Undervoltage Detection
In the event of voltages of approximately VBatt < 5.0 V, the external FET is switched off and the latch for
short-circuit detection is reset.
A hysteresis ensures that the FET is switched on again at approximately VBatt ≥ 5.4 V.
Pin 2, GND
Ground-wire Breakage
To protect the FET in the case of ground-wire breakage, a 1 MΩ resistor between gate and source is
recommended to provide proper switch-off conditions.
Pin 3, Control Input
The pulse width is controlled by means of an external potentiometer (47 kΩ). The characteristic (angle of
rotation/duty cycle) is linear. The duty cycle can be varied from 18 to 100%. It is possible to further restrict
the duty cycle with the resistors R1 and R2 (see Figure 4).
In order to reduce the power dissipation of the FET and to increase the lifetime of the lamps, the IC
automatically reduces the maximum duty cycle at pin 8 if the supply voltage exceeds V2 = 13 V. Pin 3 is
protected against short-circuit to VBatt and ground (VBatt ≤ 16.5 V).
Pin 4, Oscillator
The oscillator determines the frequency of the output voltage. This is defined by an external capacitor, C2. It
is charged with a constant current, I, until the upper switching threshold is reached. A second current source
is then activated which taps a double current, 2 x I, from the charging current. The capacitor, C2, is thus
discharged at the current, I, until the lower switching threshold is reached. The second source is then
switched off again and the procedure starts once more.
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
