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IL44608N100 参数 Datasheet PDF下载

IL44608N100图片预览
型号: IL44608N100
PDF下载: 下载PDF文件 查看货源
内容描述: 外部组件可靠和灵活的SMPS控制器 [External Components Reliable and Flexible SMPS Controller]
分类和应用: 控制器
文件页数/大小: 13 页 / 606 K
品牌: IKSEMICON [ IK SEMICON CO., LTD ]
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IL44608N  
OPERATING DESCRIPTION  
The pin 3 senses the feedback current provided by the  
opto coupler. During the switching phase the switch S2 is  
closed and the shunt regulator is accessible by the pin 3.  
The shunt regulator voltage is typically 5.0 V. The dy-  
namic resistance of the shunt regulator represented by the  
zener diode is 20 . The gain of the Control input is given  
on Figure 11/, which shows the duty cycle as a function of  
the current injected into the pin 3.  
Current Sense  
The inductor current is converted to a positive voltage  
by inserting a ground reference sense resistor RSense in se-  
ries with the power switch.  
The maximum current sense threshold is fixed at 1.0 V.  
The peak current is given by the following equation:  
A 4.0 kHz filter network is inserted between the shunt  
regulator and the PWM comparator to cancel the high fre-  
quency residual noise.  
The switch S3 is closed in Stand–by mode during the  
Latched Off Phase while the switch S2 remains open. (See  
section PULSED MODE DUTY CYCLE CONTROL).  
The resistor Rdpulsed (Rduty cycle burst) has no effect on  
the regulation process. This resistor is used to determine  
the burst duty cycle described in the chapter “Pulsed Duty  
Cycle Control”  
1
Ipkmax  
=
(A)  
RSENSE()  
In stand–by mode, this current can be lowered as due  
activation of a 200 µA current source:  
1 - (R (k ) × 0,2)  
cs  
Ipk max  
stby  
=
(A)  
R
()  
SENSE  
PWM Latch  
The current sense input consists of a filter (6.0 k , 4.0  
pF) and of a leading edge blanking. Thanks to that, this pin  
is not sensitive to the power switch turn on noise and  
spikes and practically in most applications, no filtering  
network is required to sense the current.  
The IL44608 works in voltage mode. The on–time is  
controlled by the PWM comparator that compares the os-  
cillator sawtooth with the regulation block output (refer to  
the block diagram on page 2).  
The PWM latch is initialized by the oscillator and is re-  
set by the PWM comparator or by the current sense com-  
parator in case of an over current. This configuration en-  
sures that only a single pulse appears at the circuit output  
during an oscillator cycle.  
Finally, this pin is used:  
– as a protection against over currents (Isense > I)  
– as a reduction of the peak current during a Pulsed  
Mode switching phase.  
The overcurrent propagation delay is reduced by produc-  
ing a sharp output turn off (high slew rate). This results in  
an abrupt output turn off in the event of an over current  
and in the majority of the pulsed mode switching sequence.  
5