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487G-25 参数 Datasheet PDF下载

487G-25图片预览
型号: 487G-25
PDF下载: 下载PDF文件 查看货源
内容描述: [Video Clock Generator, 48MHz, CMOS, PDSO16, 0.173 INCH, TSSOP-16]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 7 页 / 188 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS487-25
QUAD PLL FOR DTV
CLOCK SYNTHESIZER
AC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3 V ±5%,
Ambient Temperature 0 to +70° C
Parameter
Input Frequency
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Absolute Clock Period Jitter
Frequency Synthesis Error
Output Enable Time
Output Disable Time
Audio Clock Stabilization Time
Symbol
f
IN
t
OR
t
OF
Conditions
20% to 80%, Note 1
80% to 20%, Note 1
at VDD/2, Note 1
Note 1
All outputs
Min.
Typ.
27
1.2
1.0
Max. Units
MHz
ns
ns
55
%
ps
ppm
µs
ns
µs
45
50
±175
0
250
20
50
t
OE
t
OD
PDTS high to output
locked to ±1%
PDTS low to tri-state
Time from a change
in S1 or S0 until
output stable within
±1%
Note 1: Measured with a 15 pF load.
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Symbol
θ
JA
θ
JA
θ
JA
θ
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
78
70
68
37
Max. Units
°
C/W
°
C/W
°
C/W
°
C/W
Thermal Resistance Junction to Case
Marking Diagram
16
9
487G-25
######
YYWW$$
1
Notes:
1. ###### is the lot code.
2. YYWW is the last two digits of the year, and the week
number that the part was assembled.
8
IDT™ / ICS™
QUAD PLL FOR DTV
5
ICS487-25
REV B 092109