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3726M-12LF 参数 Datasheet PDF下载

3726M-12LF图片预览
型号: 3726M-12LF
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 52MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 6 页 / 118 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
 浏览型号3726M-12LF的Datasheet PDF文件第1页浏览型号3726M-12LF的Datasheet PDF文件第2页浏览型号3726M-12LF的Datasheet PDF文件第4页浏览型号3726M-12LF的Datasheet PDF文件第5页浏览型号3726M-12LF的Datasheet PDF文件第6页  
PRELIMINARY INFORMATION  
ICS3726-12  
HIGH PERFORMANCE VCXO  
The external crystal must be connected as close to the  
chip as possible and should be on the same side of the  
PCB as the ICS3726-12. There should be no vias  
between the crystal pins and the X1 and X2 device  
pins. There should be no signal traces underneath or  
close to the crystal. See application note MAN05.  
External Component Selection  
The ICS3726-12 requires a minimum number of  
external components for proper operation.  
Decoupling Capacitors  
A decoupling capacitor of 0.01 µF should be connected  
between VDD and GND on pins 6 and 4 as close to the  
ICS3726-12 as possible. For optimum device  
performance, the decoupling capacitor should be  
mounted on the component side of the PCB. Avoid the  
use of vias in the decoupling circuit.  
Crystal Tuning Load Capacitors  
The crystal traces should include pads for small fixed  
capacitors, one between X1 and ground, and another  
between X2 and ground. Stuffing of these capacitors  
on the PCB is optional. The need for these capacitors is  
determined at system prototype evaluation, and is  
influenced by the particular crystal used (manufacture  
and frequency) and by PCB layout. The typical required  
capacitor value is 1 to 4 pF. This chip has internal load  
capacitors and is designed to work with surface mount  
crystals with 10 pF load capacitance.  
Series Termination Resistor  
When the PCB trace between the clock output and the  
load is over 1 inch, series termination should be used.  
To series terminate a 50trace (a commonly used  
trace impedance), place a 33resistor in series with  
the clock line, as close to the clock output pin as  
possible. The nominal impedance of the clock output is  
20.  
The procedure for determining the value of these  
capacitors can be found in application note MAN05.  
Quartz Crystal  
The ICS3726-12 VCXO function consists of the  
external crystal and the integrated VCXO oscillator  
circuit. To assure the best system performance  
(frequency pull range) and reliability, a crystal device  
with the recommended parameters (shown below)  
must be used, and the layout guidelines discussed in  
the following section shown must be followed.  
The oscillation frequency of a quartz crystal is  
determined by its “cut” and by the load capacitors  
connected to it. The ICS3726-12 incorporates on-chip  
variable load capacitors that pull (change) the  
frequency of the crystal. The crystal specified for use  
with the ICS3726-12 is designed to have zero  
frequency error when the total of on-chip + stray  
capacitance is 10 pF.  
Recommended Crystal Parameters:  
Initial Accuracy at 25°C  
Temperature Stability  
Aging  
Load Capacitance  
Shunt Capacitance, C0  
C0/C1 Ratio  
±20 ppm  
±30 ppm  
±20 ppm  
10 pF  
7 pF max  
250 max  
35 max  
Equivalent Series Resistance  
MDS 3726-12 B  
3
Revision 120505  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
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