342M-XX 参数 Datasheet PDF下载

ICS342

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER

EPROM CLOCK SYNTHESIZER

AC Electrical Characteristics

Unless stated otherwise,

VDD = 3.3V ±5%,

Ambient Temperature -40 to +85° C

Parameter

Input Frequency

Output Frequency

Output Rise Time

Output Fall Time

Duty Cycle

Output Frequency Synthesis Error

Power-up time

Symbol

F

IN

Conditions

Fundamental Crystal

Input Clock

Min. Typ. Max. Units

5

2

0.25

1

1

40

49-51

TBD

4

0.2

10

2

60

27

50

200

MHz

MHz

MHz

ns

ns

%

ppm

ms

ms

t

OR

t

OF

20% to 80%, Note 1

80% to 20%, Note 1

Note 2

Configuration Dependent

PLL lock time from

power-up, Note 3

PDTS goes high until

stable CLK output, Spread

Spectrum Off, Note 3

PDTS goes high until

stable CLK output, Spread

Spectrum On, Note 3

4

7

ms

One Sigma Clock Period Jitter

Maximum Absolute Jitter

Note 1: Measured with 15 pF load.

t

ja

Configuration Dependent

Deviation from Mean.

Configuration Dependent

50

+200

ps

ps

Note 2: Duty Cycle is configuration dependent. Most configurations are minimum 45% and maximum 55%.

Note 3: ICS test mode output occurs for first 170 clock cycles on CLK2 for each PLL powered up. PDTS transition

high on select address change.

Thermal Characteristics

Parameter

Thermal Resistance Junction to

Ambient

Symbol

θ

JA

θ

JA

θ

JA

θ

JC

Conditions

Still air

1 m/s air flow

3 m/s air flow

Min.

Typ.

150

140

120

40

Max. Units

°

C/W

°

C/W

°

C/W

°

C/W

Thermal Resistance Junction to Case

IDT™ / ICS™

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER 6

ICS342

REV L 092109