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332M-33LFT 参数 Datasheet PDF下载

332M-33LFT图片预览
型号: 332M-33LFT
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 120MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 5 页 / 97 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS332-33
Dual Output Clock Synthesizer
Description
The ICS332-33 is a low-cost frequency generator that
is factory programmable. Using analog/digital
Phase-Locked-Loop (PLL) techniques, the device
accepts a 16.384 MHz clock input to produce output
clocks of 52 MHz and 120 MHz. In one selection the 52
MHz clock has center spread spectrum of ±1.0%.
The device also has a power down feature that
tri-states the clock outputs and turns off the PLLs when
the PDTS pin is taken low.
Features
8 pin SOIC package – Pb-free, RoHS compliant
Input clock frequency of 16.384 MHz
Two output clocks of 52 MHz and 120 MHz
Spread spectrum enabled at +1% (center)
Duty cycle of 45/55
Operating voltage of 3.3 V
Advanced, low-power CMOS process
For one output clock (lowest jitter), use the ICS331.
For three output clocks, see the ICS333. For more
than three outputs, see the ICS355 or ICS388.
Block Diagram
OTP
ROM
w ith P L L
D iv id e r
V a lu e s
SEL
1 6 .3 8 4 M H z C ry s ta l
X1
C ry s ta l
O s c illa to r
X2
PLL
C lo c k
S y n th e s is
and
C o n tro l
C irc u itry
52M
120M
O p tio n a l crysta l ca p a cito rs
P D T S (b o th o u tp u ts a n d P L L )
MDS 332-33 D
1
Integrated Device Technology, Inc.
Revision 051310
w w w. i d t . c o m