ICS307-03
SERIALLY PROGRAMMABLE CLOCK SOURCE
SER PROG CLOCK SYNTHESIZER
Table 1. Input Divider
Divide Value
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
…
2054
2055
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
12
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
11
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
10
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
9
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
8
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
Bits
6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
5
X
X
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
4
X
X
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
3
X
X
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
2
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
subtract 8 from the
desired divide value,
convert to binary, and
apply to bits 11...2
Bits [1..0] = 11
Rule
1+ Bit 0
1 + Bit 0
subtract 2 from the
desired value, convert to
binary, invert, and apply
to bits 5...2
Bits [1..0] = 10
Table 2. VCO Divider
Bits
Divide Value
12
13
14
2054
2055
…
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
IDT™ / ICS™
SERIALLY PROGRAMMABLE CLOCK SOURCE
3
ICS307-03
REV J 090209
23
0
0
0
22
0
0
0
21
0
0
0
20
0
0
0
19
0
0
0
18
0
0
0
17
0
0
0
16
0
0
0
15
1
1
1
14
0
0
1
13
0
1
0
Rule
subtract 8 from the desired
divide value, convert to
binary, and apply to bits
23...13