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275PGT 参数 Datasheet PDF下载

275PGT图片预览
型号: 275PGT
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, TSSOP-16]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 10 页 / 220 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS275
TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER
EPROM VCXO AND SYNTHESIZER
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (ICS275PG/PGLF)
Ambient Operating Temperature (ICS275PGI/PGILF)
Power Supply Voltage (measured in respect to GND)
Power Supply Ramp Time
Reference crystal parameters
Min.
0
-40
+3.135
Typ.
Max.
+70
+85
Units
°
C
°
C
V
ms
+3.3
+3.465
4
Refer to page 3
DC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3V ±5%,
Ambient Temperature -40 to +85° C
Parameter
Operating Voltage
Symbol
VDD
Conditions
Config. Dependent - See
VersaClock
TM
Estimates
Min.
3.135
Typ.
Max.
3.465
Units
V
mA
Operating Supply Current
Input High Voltage
Input High Voltage
Input Low Voltage
Input High Voltage, PDTS
Input Low Voltage, PDTS
Input High Voltage
Input Low Voltage
Output High Voltage
(CMOS High)
Output High Voltage
Output Low Voltage
Short Circuit Current
Nom. Output Impedance
Internal Pull-up Resistor
Internal Pull-down Resistor
Input Capacitance
IDD
Four 33.3333 MHz outs,
PDTS = 1, no load, Note 1
PDTS = 0, no load, Note 1
S2:S0
VDD/2+1
S2:S0
VDD-0.5
22
500
0.4
0.4
mA
µA
V
V
V
V
V
VDD/2-1
V
V
V
0.4
V
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OH
V
OL
I
OS
Z
O
R
PUS
R
PD
C
IN
ICLK
ICLK
I
OH
= -4 mA
I
OH
= -8 mA (Low Drive);
I
OH
= -12 mA (High Drive)
I
OL
= 8 mA (Low Drive);
I
OL
= 12 mA (High Drive)
Low Drive
High Drive
S2:S0, PDTS
CLK outputs
Inputs
VDD/2+1
VDD-0.4
2.4
±40
±70
20
190
120
4
mA
kΩ
kΩ
pF
Note 1: Example with 25 MHz crystal input with four outputs of 33.3 MHz, no load, and VDD = 3.3 V.
IDT™ / ICS™
TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER 5
ICS275
REV D 102808