IDT23S09E
3.3V ZERO DELAY CLOCK BUFFER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
PIN CONFIGURATION
REF
CLKA1
CLKA2
V
DD
GND
CLKB1
CLKB2
S2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SOIC/ TSSOP
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Supply Voltage Range
Input Voltage Range (REF)
Input Voltage Range
(except REF)
I
IK
(V
I
< 0)
I
O
(V
O
= 0 to V
DD
)
V
DD
or GND
T
A
= 55°C
(in still air)
(3)
T
STG
Operating
Temperature
Operating
Temperature
Storage Temperature Range
Commercial Temperature
Range
Industrial Temperature
Range
-40 to +85
°C
–65 to +150
0 to +70
°C
°C
Input Clamp Current
Continuous Output Current
Continuous Current
Maximum Power Dissipation
Max.
–0.5 to +4.6
–0.5 to +5.5
–0.5 to
V
DD
+0.5
–50
±50
±100
0.7
mA
mA
mA
W
Unit
V
V
V
CLKOUT
CLKA4
CLKA3
V
DD
GND
CLKB4
CLKB3
S1
V
DD
V
I (2)
V
I
APPLICATIONS:
•
•
•
•
•
SDRAM
Telecom
Datacom
PC Motherboards/Workstations
Critical Path Delay Designs
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed.
3. The maximum package power dissipation is calculated using a junction temperature
of 150°C and a board trace length of 750 mils.
PIN DESCRIPTION
Pin Name
REF
(1)
CLKA1
(2)
CLKA2
V
DD
GND
CLKB1
(2)
CLKB2
(2)
S2
(3)
S1
(3)
CLKB3
(2)
CLKB4
(2)
(2)
Pin Number
1
2
3
4, 13
5, 12
6
7
8
9
10
11
14
15
16
Type
IN
Out
Out
PWR
GND
Out
Out
IN
IN
Out
Out
Out
Out
Out
Functional Description
Input reference clock, 5 Volt tolerant input
Output clock for bank A
Output clock for bank A
3.3V Supply
Ground
Output clock for bank B
Output clock for bank B
Select input Bit 2
Select input Bit 1
Output clock for bank B
Output clock for bank B
Output clock for bank A
Output clock for bank A
Output clock, internal feedback on this pin
CLKA3
(2)
CLKA4
(2)
CLKOUT
(2)
NOTES:
1. Weak pull down.
2. Weak pull down on all outputs.
3. Weak pull ups on these inputs.
2
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
