IDT23S09T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
COMMERCIAL TEMPERATURE RANGE
2.5V ZERO DELAY
CLOCK BUFFER, SPREAD
SPECTRUM COMPATIBLE
FEATURES:
DESCRIPTION:
IDT23S09T
• Phase-Lock Loop Clock Distribution
• 10MHz to 133MHz operating frequency
• Distributes one clock input to one bank of five and one bank of
four outputs
• Separate output enable for each output bank
• Output Skew < 250ps
• Low jitter <200 ps cycle-to-cycle
• No external RC network required
• Operates at 2.5V V
DD
• Spread spectrum compatible
• Available in SOIC package
The IDT23S09T is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT23S09T is a 16-pin version of the IDT23S05T. The IDT23S09T
accepts one reference input, and drives two banks of four low skew clocks.
All parts have on-chip PLLs which lock to an input clock on the REF pin.
The PLL feedback is on-chip and is obtained from the CLKOUT pad. In
the absence of an input clock, the IDT23S09T enters power down, and
the outputs are tri-stated. In this mode, the device will draw less than 12µA.
FUNCTIONAL BLOCK DIAGRAM
16
CLKOUT
1
REF
PLL
2
CLKA1
3
CLKA2
14
CLKA3
15
CLKA4
S2
S1
8
9
Control
Logic
6
CLKB1
7
CLKB2
10
CLKB3
11
CLKB4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
1
c
2003 Integrated Device Technology, Inc.
MAY 2010
DSC 6396/8
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
