ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
Bit
Definition
When Bit = 0
Bit value depends on the Bit value depends on the
particular message particular message
Bit value depends on the Bit value depends on the
particular message particular message
Bit value depends on the Bit value depends on the
particular message particular message
Bit value depends on the Bit value depends on the
When Bit = 1
Access 2 SF2
Default3
Hex
8.3
8.2
8.1
8.0
Message code field
/Unformatted code field
RO
RO
RO
RO
–
–
–
–
0
0
0
0
0
Message code field
/Unformatted code field
Message code field
/Unformatted code field
Message code field
/Unformatted code field
particular message
particular message
Register 9 through 15h - Reserved by IEEE
Register 16h - Extended Control Register
16.15
Command Override
Write enable
Disabled
Enabled
RW
SC
0
–
16.14
16.13
16.12
16.11
16.10
16.9
ICS reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RW/0
RW/0
RW/0
RW/0
RO
–
–
–
–
–
–
–
–
–
–
0
0
0
0
1
L
L
L
L
0
ICS reserved
ICS reserved
ICS reserved
–
–
PHY Address Bit 4
PHY Address Bit 3
PHY Address Bit 2
PHY Address Bit 1
PHY Address Bit 0
RO
16.8
RO
16.7
RO
16.6
RO
16.5
Stream Cipher Test
Mode
Normal operation
Test mode
RW
16.4
16.3
16.2
16.1
16.0
ICS reserved
Read unspecified
NRZ encoding
Read unspecified
NRZI encoding
Enabled
RW/0
RW
–
–
–
–
–
–
1
0
0
0
NRZ/NRZI encoding
Transmit invalid codes
ICS reserved
8
–
Disabled
RW
Read unspecified
Stream Cipher enabled
Read unspecified
Stream Cipher disabled
RW/0
RW
Stream Cipher disable
Register 17h - Quick Poll Detailed Status Register
17.15
17.14
17.13
Data rate
Duplex
10 Mbps
100 Mbps
RO
RO
RO
–
–
–
–
0
Half duplex
Full duplex
Auto-Negotiation
Progress Monitor Bit 2
Reference Decode Table Reference Decode Table
LM
X
17.12
Auto-Negotiation
Progress Monitor Bit 1
Reference Decode Table Reference Decode Table
RO
LM
X
0
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
22
ICS1894-40
REV G 060110