ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
Bit
Definition
When Bit = 0
When Bit = 1
Access 2 SF2
Default3
Hex
Register 1h - Control
1.15
100Base-T4
Always 0. (Not
N/A
RO
–
0
7
supported.)
1.14
1.13
1.12
1.11
1.10
1.9
100Base-TX full duplex
Mode not supported
Mode supported
Mode supported
Mode supported
Mode supported
N/A
CW
CW
CW
CW
CW
CW
CW
CW
RO
–
–
–
–
–
–
–
–
–
1
1
100Base-TX half duplex Mode not supported
10Base-T full duplex
10Base-T half duplex
IEEE reserved
Mode not supported
Mode not supported
Always 0
1
1
8
0
0†
0†
0†
0†
0
IEEE reserved
Always 0
N/A
1.8
IEEE reserved
Always 0
N/A
1.7
IEEE reserved
Always 0
N/A
1.6
MF Preamble
suppression
PHY requires MF
Preambles
PHY does not require MF
Preambles
1.5
Auto-Negotiation
complete
Auto-Negotiation is in
process, if enabled
Auto-Negotiation is
completed
RO
LH
0
1.4
1.3
Remote fault
No remote fault detected Remote fault detected
RO
RO
LH
–
0
1
Auto-Negotiation ability
N/A
Always 1: PHY has
9
Auto-Negotiation ability
1.2
1.1
1.0
Link status
Link is invalid/down
No jabber condition
N/A
Link is valid/established
Jabber condition detected
RO
RO
RO
LL
LH
–
0
0
1
Jabber detect
Extended capability
Always 1: PHY has
extended capabilities
Register 2h - PHY Identifier
2.15
2.14
2.13
2.12
2.11
2.10
2.9
OUI bit 3 | c
OUI bit 4 | d
OUI bit 5 | e
OUI bit 6 | f
OUI bit 7 | g
OUI bit 8 | h
OUI bit 9 | I
OUI bit 10 | j
OUI bit 11 | k
OUI bit 12 | l
OUI bit 13 | m
OUI bit 14 | n
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
–
–
–
–
–
–
–
–
–
–
–
–
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
2.8
2.7
2.6
2.5
2.4
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
17
ICS1894-40
REV G 060110
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
