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1893CKIT 参数 Datasheet PDF下载

1893CKIT图片预览
型号: 1893CKIT
PDF下载: 下载PDF文件 查看货源
内容描述: [Interface Circuit, 1-Trnsvr, CMOS, PQCC56, 8 X 8 MM, PLASTIC, M0-220VLLD-5, MLF2-56]
分类和应用: 电信电信集成电路
文件页数/大小: 127 页 / 1388 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS1893CF Data Sheet - Release  
Chapter 8 Pin Diagram, Listings, and Descriptions  
Table 8-7. MAC Interface Pins: Media Independent Interface (MII) (Continued)  
Pin  
Pin  
Pin  
Pin Description  
Name Number  
Type  
RXD0  
RXD1  
RXD2  
RXD3  
31  
30  
29  
28  
Output Receive Data 0–3.  
RXD0 is the least-significant bit and RXD3 is the most-significant bit of  
the MII receive data nibble.  
While the ICS1893CF asserts RXDV, the ICS1893CF transfers the  
receive data signals on the RXD0–RXD3 pins to the MAC Interface  
synchronously on the rising edges of RXCLK.  
RXDV  
32  
Output Receive Data Valid.  
The ICS1893CF asserts RXDV to indicate to the MAC that data is  
available on the MII Receive Bus (RXD[3:0]). The ICS1893CF:  
Asserts RXDV after it detects and recovers the Start-of-Stream  
delimiter, /J/K/. (For the timing reference, see Chapter 9.5.6,  
“100M/MII Media Independent Interface: Synchronous Receive  
Timing”.)  
De-asserts RXDV after it detects either the End-of-Stream delimiter  
(/T/R/) or a signal error.  
Note: RXDV is synchronous with the Receive Data Clock, RXCLK.  
RXER  
35  
Output Receive Error.  
When the MAC Interface is in:  
10M MII mode, RXER is not used.  
100M MII mode, the ICS1893CF asserts a signal on the RXER pin  
when either of the following two conditions are true:  
– Errors are detected during the reception of valid frames  
– A False Carrier is detected  
Note:  
1. An ICS1893CF asserts a signal on the RXER pin upon detection of a  
False Carrier so that repeater applications can prevent the  
propagation of a False Carrier.  
2. The RXER signal always transitions synchronously with RXCLK.  
3. The signal on RXER pin is conditioned by the RXTRI pin.  
TXCLK  
37  
Output Transmit Clock.  
The ICS1893CF generates this clock signal to synchronize the transfer of  
data from the MAC Interface to the ICS1893CF. When the mode is:  
10Base-T, the TXCLK frequency is 2.5 MHz.  
100Base-TX, the TXCLK frequency is 25 MHz.  
ICS1893CF, Rev. J, 08/11/09  
August, 2009  
Copyright © 2009, Integrated Device Technology, Inc.  
All rights reserved.  
92  
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