ICS1893AF Data Sheet - Release
Table of Contents
Table of Contents
Section
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
10.5.9
10.5.10
10.5.11
10.5.12
10.5.13
Title
Page
Transformer Interface Pins ...................................................................................100
Multi-Function (Multiplexed) Pins: PHY Address and LED Pins ...........................101
Configuration Pins.................................................................................................104
MAC Interface Pins ...............................................................................................105
Ground and Power Pins........................................................................................109
10M Media Independent Interface: Transmit Latency...........................................122
100M/MII Media Independent Interface: Transmit Latency...................................123
100M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)................124
10M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)..................125
100M MII Media Independent Interface: Receive Latency....................................126
ICS1893AF, Rev. D 10/26/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
7
October, 2004
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
