ICS1893AF Data Sheet - Release
Chapter 8 Management Register Set
8.11 Register 16: Extended Control Register
Table 8-16 lists the bits for the Extended Control Register, which the ICS1893AF provides to allow an STA
to customize the operations of the device.
Note:
1. For an explanation of acronyms used in Table 8-16, see Chapter 1, “Abbreviations and Acronyms”.
2. During any write operation to any bit in this register, the STA must write the default value to all
Reserved bits.
Table 8-16. Extended Control Register (register 16 [0x10])
Bit
Definition
When Bit = 0
When Bit = 1
Ac-
SF
De-
Hex
cess
fault
16.15 Command Override Write Disabled
enable
Enabled
RW
SC
0
–
16.14 ICS reserved
16.13 ICS reserved
16.12 ICS reserved
16.11 ICS reserved
16.10 PHY Address Bit 4
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
RW/0
RW/0
RW/0
RW/0
RO
–
–
–
–
–
0
Read unspecified
Read unspecified
Read unspecified
0
0
0
–
For a detailed explanation of this bit’s operation,
see Section 6.5, “Status Interface”.
P4RD†
16.9
16.8
16.7
16.6
PHY Address Bit 3
PHY Address Bit 2
PHY Address Bit 1
PHY Address Bit 0
For a detailed explanation of this bit’s operation,
see Section 6.5, “Status Interface”.
RO
RO
RO
RO
–
–
–
–
P3TD†
P2LI†
For a detailed explanation of this bit’s operation,
see Section 6.5, “Status Interface”.
For a detailed explanation of this bit’s operation,
see Section 6.5, “Status Interface”.
P1CL†
P0AC†
–
8
For a detailed explanation of this bit’s operation,
see Section 6.5, “Status Interface”.
16.5
16.4
16.3
16.2
16.1
16.0
Stream Cipher Test Mode Normal operation
Test mode
RW
RW/0
RW
–
–
–
–
–
–
0
–
1
0
0
0
ICS reserved
Read unspecified
NRZ encoding
Disabled
Read unspecified
NRZI encoding
Enabled
NRZ/NRZI encoding
Transmit invalid codes
ICS reserved
RW
Read unspecified
Read unspecified
RW/0
RW
Stream Cipher disable
Stream Cipher enabled Stream Cipher disabled
† The default is the state of this pin at reset.
ICS1893AF, Rev D 10/26/04
October, 2004
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
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