ICS1892
TSD
Chapter 8 Management Register Set
10Base-T/100BIaCseS-TX1I8nt9eg2rated PHYceiver™
8.3.9 Remote Fault (bit 1.4)
The STA reads bit 1.4 to determine if a Remote Fault exists. The ICS1892 sets bit 1.4 based on the Remote
Fault bit received from its remote link partner. The ICS1892 receives the Remote Fault bit as part of the
Link Code Word exchanged during the auto-negotiation process. If the remote link partner:
• Sets the Link Code Word Remote Fault bit to logic one, then the ICS1892 sets bit 1.4 to logic one. In this
case, the remote link partner reports the detection of a fault, which typically occurs when the remote link
partner is having a problem with its receive channel.
• Clears the Link Code Word Remote Fault bit to logic zero, then the ICS1892 sets bit 1.4 to logic zero.
Bit 1.4 is a latching high status bit. (For more information on latching high and latching low bits, see Section
8.1.4.1, “Latching High Bits” and Section 8.1.4.2, “Latching Low Bits”.)
Note: The STA can access the Remote Fault bit through Management Registers 1 (bit 1.4), 5 (bit 5.13),
and 17 (bit 17.1). The Remote Fault bit is cleared when an STA reads any one of these bits.
8.3.10 Auto-Negotiation Ability (bit 1.3)
The STA reads bit 1.3 to determine if the ICS1892 can support the auto-negotiation process. If the
ICS1892:
• Cannot support the auto-negotiation process, it clears bit 1.3 to logic zero.
• Can support the auto-negotiation process, it sets bit 1.3 to logic one. (For the ICS1892, the default value
of bit 1.3 is logic one.)
8.3.11 Link Status (bit 1.2)
The purpose of this Link Status bit (as well as the QuickPoll Register’s Link Status bit, bit 17.0) is to
determine if an established link is dropped, even momentarily. An STA reads bit 1.2 to determine the state
of the link between the ICS1892 and its remote partner. To indicate a link that is:
• Valid, the ICS1892 sets bit 1.2 to logic one.
• Invalid, the ICS1892 clears bit 1.2 to logic zero.
This bit is a latching low (LL) bit that the Link Monitor function controls. (For more information on latching
high and latching low bits, see Section 8.1.4.1, “Latching High Bits” and Section 8.1.4.2, “Latching Low
Bits”.) The criterion used by the Link Monitor to determine if a link is valid or invalid depends on the
following:
• Type of link
• Present link state (valid or invalid)
• Presence of any link errors
• Auto-negotiation process
The Link Monitor function observes the data received by either 10Base-T or 100Base-TX Twisted-Pair
Receivers to determine the link status. The results of this continual monitoring are stored in the Link Status
bit. An STA can access the Link Status bit in either the Status Register (bit 1.2) or the QuickPoll Detailed
Status Register (bit 17.0).
If Auto-Negotiation mode is enabled, a local receive channel error occurs if link pulses are not present
during the auto-negotiation process or when operating in the 10Base-T mode.
Note: The Link Status bit is accessible through two Management Registers and is set high when an STA
reads either one of them.
ICS1892, Rev. D, 2/26/01
February 26, 2001
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
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IDT™ / ICS™ 10Base-T/100Base-TX Integrated PHYceiver™
ICS1892
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