欢迎访问ic37.com |
会员登录 免费注册
发布采购

1892Y-14 参数 Datasheet PDF下载

1892Y-14图片预览
型号: 1892Y-14
PDF下载: 下载PDF文件 查看货源
内容描述: [Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP64]
分类和应用: 以太网:16GBASE-T电信电信集成电路
文件页数/大小: 148 页 / 1762 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
 浏览型号1892Y-14的Datasheet PDF文件第46页浏览型号1892Y-14的Datasheet PDF文件第47页浏览型号1892Y-14的Datasheet PDF文件第48页浏览型号1892Y-14的Datasheet PDF文件第49页浏览型号1892Y-14的Datasheet PDF文件第51页浏览型号1892Y-14的Datasheet PDF文件第52页浏览型号1892Y-14的Datasheet PDF文件第53页浏览型号1892Y-14的Datasheet PDF文件第54页  
ICS1892  
10Base-T/100Base-TX Integrated PHYceiver™  
TSD  
7.5.4 10Base-T Operation: Idle  
The ICS1892 10Base-T Idle Function transmits link pulses in the absence of data (that is, when the  
MAC/repeater is not requiring it to transmit any data). During this time the link is Idle, and the 10Base-T Idle  
Function begins periodically transmitting link pulses at a rate of one pulse every 16 ms, as defined in the  
ISO/IEC 8802-3 standard. In 10Base-T mode, the ICS1892 transmits link pulses whenever the  
MAC/repeater does not have any data available for transmission. The ICS1892 continues transmitting link  
pulses while receiving data. Because link pulses indicate an idle state for a link, this situation does not  
generate a Collision Detect signal (COL).  
7.5.5 10Base-T Operation: Link Monitor  
When the ICS1892 is in 10Base-T mode, the Link Monitor Function observes the data received by the  
10Base-T Twisted-Pair Receiver to determine the link status. The results of this continual monitoring are  
stored in the Link Status bit. The Station Management entity (STA) can access the Link Status bit in either  
the Status Register (bit 1.2) or the QuickPoll Detailed Status Register (bit 17.0). This Link Status bit is a  
latching low (LL) bit. (For more information on latching high and latching low bits, see Section 8.1.4.1,  
“Latching High Bits” and Section 8.1.4.2, “Latching Low Bits”.)  
The STA can control the execution of the Smart Squelch Function using bit 18.0 (the Smart Squelch Inhibit  
bit in the 10Base-T Operations Register). The Squelch Inhibit bit allows an STA to control the ICS1892  
Squelch Detection in 10Base-T mode. When an STA sets this bit to logic:  
Zero, before the ICS1892 can establish a valid link, the ICS1892 must receive valid 10Base-T data.  
One, before the ICS1892 can establish a valid link, the ICS1892 must receive both valid 10Base-T data  
followed by an IDL.  
The criteria used by the Link Monitoring Function to declare a link either valid (that is, ‘established’ or ‘up’)  
or invalid (that is, ‘failed’ or ‘down’) depends upon the present state of the link and the incoming data. When  
the 10Base-T link is:  
Valid, the Link Monitor Function continues to report the link as valid as long as it detects either data or  
Normal Link Pulses (NLPs) on its Twisted-Pair Receiver. If the 10Base-T Operations Register’s Smart  
Squelch Inhibit bit (bit 18.0) is:  
– Enabled, before the 10Base-T link can be valid, there must be an IDL at the end of a data packet.  
– Disabled, before the 10Base-T link can be valid, all that is needed is a data packet.  
Invalid, the Link Monitor Function must detect one of three events before transitioning the link from the  
invalid state to the valid state. If the ICS1892 receives any of the following it changes the status of the  
link from invalid to valid:  
– More than seven Normal Link Pulses (NLPs)  
– Any data  
– Any data followed by a valid IDL  
The ICS1892 receives data when the Twisted-Pair Receiver phase-locked loop can acquire lock and  
extract the receive clock from the incoming data stream for three bit times.  
If the ICS1892 receives neither data nor NLPs (that is, the link shows either no activity or inconsistent  
activity) for more than 81 to 83 ms, then the ICS1892 declares the link invalid and sets the LL Link Status  
bit to logic zero. The LL Link Status bit remains latched in the cleared state until a reset occurs or until  
the STA reads it while the link is valid.  
Note:  
1. When the link is invalid and the ICS1892 detects the presence of data, the ICS1892 does not transition  
the link to the valid state until after the reception of the present packet is complete.  
2. Enabling or disabling the Smart Squelch Function affects the Link Monitor function.  
3. A transition from the invalid state to the valid state does not automatically update the LL Link Status bit.  
IDT™ / ICS™ 10Base-T/100Base-TX Integrated PHYceiver™  
ICS1892  
50  
 复制成功!