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1527G-60LFT 参数 Datasheet PDF下载

1527G-60LFT图片预览
型号: 1527G-60LFT
PDF下载: 下载PDF文件 查看货源
内容描述: [PLL Based Clock Driver, 1527 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, 0.65 MM PITCH, LEAD FREE, TSSOP-16]
分类和应用: 驱动光电二极管逻辑集成电路
文件页数/大小: 11 页 / 92 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS1527 Data Sheet  
Section 5 AC/DC Operating Conditions  
Parameter  
Symbol  
Min.  
Typical  
Max.  
Units  
Notes  
HSYNC to HSYNC_out  
propagation delay (with  
Schmitt-trigger)  
6
10  
ns  
1
CLK to HSYNC_out/  
VSYNC_out skew  
1.0  
1.5  
ns  
ns  
Clock and  
HSYNC_out/VSYNC_out  
Transition Time - Rise  
T
1.0  
1.0  
2
2
CR  
Clock and  
HSYNC_out/VSYNC_out  
Transition Time - Fall  
T
T
1.5  
ns  
CF  
LOCK Transition Time - Rise  
LOCK Transition Time - Fall  
3.0  
2.0  
ns  
ns  
2
2
LR  
T
LF  
Note 1—Measured between chosen edge of HSYNC (00h:2) and rising edge of output  
o
Note 2—Measured at 110 MHz, 3.3 VDC, 25 C, 15 pF, unterminated  
MDS 1527 G  
10  
Revision 110905  
www.idt.com