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IC41LV16256-35TIG 参数 Datasheet PDF下载

IC41LV16256-35TIG图片预览
型号: IC41LV16256-35TIG
PDF下载: 下载PDF文件 查看货源
内容描述: 256Kx16位动态RAM与EDO页面模式 [256Kx16 bit Dynamic RAM with EDO Page Mode]
分类和应用: 存储内存集成电路光电二极管动态存储器
文件页数/大小: 21 页 / 209 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IC41C16256  
IC41LV16256  
256K x 16 (4-MBIT) DYNAMIC RAM  
WITH EDO PAGE MODE  
DESCRIPTION  
FEATURES  
The ICSI IC41C16256 and IC41LV16256 is a 262,144 x 16-  
bit high-performance CMOS Dynamic Random Access Memo-  
ries. The IC41C16256 offer an accelerated cycle access  
called EDO Page Mode. EDO Page Mode allows 512 random  
accesses within a single row with access cycle time as short  
as 10 ns per 16-bit word. The Byte Write control, of upper and  
lower byte, makes the IC41C16256 ideal for use in  
16-, 32-bit wide data bus systems.  
• Extended Data-Out (EDO) Page Mode access cycle  
• TTL compatible inputs and outputs; tristate I/O  
• Refresh Interval: 512 cycles /8 ms  
• Refresh Mode: RAS-Only, CAS-before-RAS (CBR),  
Hidden  
• Single power supply:  
5V ± 10% (IC41C16256)  
3.3V ± 10% (IC41LV16256)  
These features make the IC41C16256and IC41LV16256 ideally  
suited for high-bandwidth graphics, digital signal processing,  
high-performance computing systems, and peripheral  
applications.  
• Byte Write and Byte Read operation via two CAS  
• Industrail Temperature Range -40oC to 85oC  
Pb-free package is available  
The IC41C16256 is packaged in a 40-pin 400mil SOJ and  
400mil TSOP-2.  
KEY TIMING PARAMETERS  
Parameter  
-25(5V)  
-35  
35  
10  
18  
12  
60  
-50  
50  
14  
25  
20  
90  
-60  
60  
15  
30  
25  
Unit  
ns  
ns  
ns  
ns  
Max. RAS Access Time (tRAC)  
Max. CAS Access Time (tCAC)  
Max. Column Address Access Time (tAA)  
Min. EDO Page Mode Cycle Time (tPC)  
Min. Read/Write Cycle Time (tRC)  
25  
8
12  
10  
45  
110  
ns  
PIN CONFIGURATIONS  
40-Pin TSOP-2  
40-Pin SOJ  
PIN DESCRIPTIONS  
VCC  
I/O0  
I/O1  
I/O2  
I/O3  
VCC  
I/O4  
I/O5  
I/O6  
I/O7  
1
2
3
4
5
6
7
8
9
10  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
GND  
I/O15  
I/O14  
I/O13  
I/O12  
GND  
I/O11  
I/O10  
I/O9  
VCC  
I/O0  
I/O1  
I/O2  
I/O3  
VCC  
I/O4  
I/O5  
I/O6  
I/O7  
NC  
1
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
GND  
A0-A8  
Address Inputs  
2
I/O15  
I/O14  
I/O13  
I/O12  
GND  
I/O11  
I/O10  
I/O9  
I/O8  
NC  
I/O0-15 Data Inputs/Outputs  
3
4
WE  
Write Enable  
5
OE  
Output Enable  
6
7
RAS  
UCAS  
LCAS  
Vcc  
Row Address Strobe  
Upper Column Address Strobe  
Lower Column Address Strobe  
Power  
8
9
I/O8  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
NC  
NC  
WE  
RAS  
NC  
A0  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
NC  
NC  
LCAS  
UCAS  
OE  
LCAS  
UCAS  
OE  
WE  
RAS  
NC  
GND  
NC  
Ground  
A8  
No Connection  
A8  
A0  
A7  
A7  
A1  
A6  
A1  
A6  
A2  
A5  
A2  
A5  
A3  
A4  
A3  
A4  
VCC  
GND  
VCC  
GND