ICS557-03
PCI-EXPRESS CLOCK SOURCE
AC Electrical Characteristics - CLK0/CLK1, CLK0/CLK1
Unless stated otherwise, VDD=3.3 V 10%, Ambient Temperature -40 to +85°C
Parameter
Input Frequency
Symbol
Conditions
Min.
Typ.
Max.
Units
MHz
MHz
mV
25
Output Frequency
Output High Voltage
25
200
850
1,2
1,2
V
Notes 1, 2
Notes 1, 2
660
-150
250
700
0
OH
Output Low Voltage
Crossing Point
V
mV
OL
Absolute, Notes 1, 2
350
550
140
mV
1,2
Voltage
Crossing Point
Variation over all edges, Notes 1, 2, 4
mV
1,2,4
Voltage
1,3
Jitter, Cycle-to-Cycle
Notes 1, 3
60
ps
kHz
ps
Modulation Frequency
Spread spectrum
30
31.5
332
344
33
1,2
Rise Time
t
From 0.175 V to 0.525 V, Notes 1, 2
From 0.525 V to 0.175 V, Notes 1, 2
Notes 1, 2
175
175
700
700
125
OR
1,2
Fall Time
t
ps
OF
Rise/Fall Time
ps
1,2
Variation
Skew between outputs
At VDD/2
50
55
ps
%
1,3
Duty Cycle
Notes 1, 3
45
5
Output Enable Time
All outputs, Note 5
All outputs, Note 5
From power-up VDD=3.3 V
Settling period after spread change
10
10
us
us
ms
ms
5
Output Disable Time
Stabilization Time
t
3.0
3.0
STABLE
Spread Change Time
t
SPREAD
Note 1: Test setup is R =50 ohms with 2 pF, Rr = 475Ω (1%).
L
Note 2: Measurement taken from a single-ended waveform.
Note 3: Measurement taken from a differential waveform.
Note 4: Measured at the crossing point where instantaneous voltages of both CLK and CLK are equal.
Note 5: CLK pins are tri-stated when OE is low asserted. CLK is driven differential when OE is high.
MDS 557-03 E
7
Revision 061005
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
