Integrated Circuit Systems, Inc.
ICS1893 Brief
General
The ICS1893 is a low-power, physical-layer device (PHY)
that supports the ISO/IEC 10Base-T and 100Base-TX
Carrier-Sense Multiple Access/Collision Detection
(CSMA/CD) Ethernet standards. The ICS1893 architecture
is based on the ICS1892. The ICS1893 supports managed or
unmanaged node, repeater, and switch applications.
The ICS1893 incorporates digital signal processing (DSP)
in its Physical Medium Dependent (PMD) sublayer. As a
result, it can transmit and receive data on unshielded
twisted-pair (UTP) category 5 cables with attenuation in
excess of 24 dB at 100 MHz. With this ICS-patented
technology, the ICS1893 can virtually eliminate errors from
killer packets.
The ICS1893 provides a Serial Management Interface for
exchanging command and status information with a Station
Management (STA) entity.
The ICS1893 Media Dependent Interface (MDI) can be
configured to provide either half- or full-duplex operation at
data rates of 10 MHz or 100 MHz. The MDI configuration
can be established manually (with input pins or control
register settings) or automatically (using the
A u t o - N eg o t i a t i o n f e a t u r e s ) . W h e n t h e I C S 1 8 9 3
Auto-Negotiation sublayer is enabled, it exchanges
technology capability data with its remote link partner and
automatically selects the highest-performance operating
mode they have in common.
Document Type: Brief
Document Stage: Release
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™
Features
•
Supports category 5 cables with attenuation in excess of
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24 dB at 100 MHz across a temperature range from -5° to
+85° C
DSP-based baseline wander correction to virtually
eliminate killer packets across temperature range of from
-5° to +85° C
Low-power, 0.35-micron CMOS (typically 400 mW)
Single 3.3-V power supply.
Single-chip, fully integrated PHY provides PCS, PMA,
PMD, and AUTONEG sublayers of IEEE standard
10Base-T and 100Base-TX IEEE 802.3 compliant
Fully integrated, DSP-based PMD includes:
– Adaptive equalization and baseline wander correction
– Transmit wave shaping and stream cipher scrambler
– MLT-3 encoder and NRZ/NRZI encoder
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Node, repeater, and switch applications
Managed and unmanaged applications
10M or 100M half- and full-duplex modes
Parallel detection
Auto-negotiation, with Next Page capabilities
•
Highly configurable design supports:
•
MAC/Repeater Interface can be configured as:
– 10M or 100M Media Independent Interface
– 100M Symbol Interface (bypasses the PCS)
– 10M 7-wire Serial Interface
•
Small Footprint 64-pin Thin Quad Flat Pack (TQFP)
ICS1893 Block Diagram
100Base-T
10/100 MII or
Alternate
MAC/Repeater
Interface
Interface
MUX
PCS
• Frame
• CRS/COL
Detection
• Parallel to Serial
• 4B/5B
PMA
• Clock Recovery
• Link Monitor
• Signal Detection
• Error Detection
TP_PMD
• MLT-3
• Stream Cipher
• Adaptive Equalizer
• Baseline Wander
Correction
Integrated
Switch
10Base-T
MII
Extended
Register
Set
Low-Jitter
Clock
Synthesizer
Clock
Power
Twisted-
Pair
Interface to
Magnetics
Modules and
RJ45
Connector
MII Serial
Management
Interface
Configuration
and Status
Auto-
Negotiation
LEDs and PHY
Address
1893Brief Rev B 9/10/99
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any information
being relied upon by the customer is current and accurate.
September, 1999
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
