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ICS1893CK 参数 Datasheet PDF下载

ICS1893CK图片预览
型号: ICS1893CK
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3 -V的10Base -T / 100BASE - TX集成PHYceive [3.3-V 10Base-T/100Base-TX Integrated PHYceive]
分类和应用: 电信集成电路
文件页数/大小: 126 页 / 1927 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1893CF Data Sheet Rev. F - Release  
Chapter 7 Management Register Set  
7.3.9 Remote Fault (bit 1.4)  
An STA reads bit 1.4 to determine if a Remote Fault exists. The ICS1893CF sets bit 1.4 based on the  
Remote Fault bit received from its remote link partner. The ICS1893CF receives the Remote Fault bit as  
part of the Link Code Word exchanged during the auto-negotiation process. If the ICS1893CF receives a  
Link Code Word from its remote link partner and the Remote Fault bit is set to:  
Zero, then the ICS1893CF sets bit 1.4 to logic zero.  
One, then the ICS1893CF sets bit 1.4 to logic one. In this case, the remote link partner is reporting the  
detection of a fault, which typically occurs when the remote link partner is having a problem with its  
receive channel.  
Bit 1.4 is a latching high status bit. (For more information on latching high and latching low bits, see Section  
7.1.4.1, “Latching High Bits” and Section 7.1.4.2, “Latching Low Bits”.)  
Note: The ICS1893CF has two versions of the Remote Fault bit.  
One version of the Remote Fault bit is a latching high version. An STA can access this version  
through either Management Register 1 (bit 1.4) or 17 (bit 17.1). This bit 1.4/17.1 is cleared when  
an STA reads either of these registers. (Bit 1.4 is identical to bit 17.1 in that they are the same  
internal bit.)  
Another version of the Remote Fault bit is updated whenever the ICS1893CF receives a new  
Link Control Word. An STA can access this version through Management Register 5 (bit 5.13),  
which like bits 1.4/17.1, also reports the status of the Remote Fault bit received from the remote  
link partner. However, bit 5.13 is not a latching high bit.  
The operation of both bit 1.4/17.1 and bit 5.13 are in compliance with the IEEE Std 802.3u.  
7.3.10 Auto-Negotiation Ability (bit 1.3)  
The STA reads bit 1.3 to determine if the ICS1893CF can support the auto-negotiation process. If the  
ICS1893CF:  
Cannot support the auto-negotiation process, it clears bit 1.3 to logic zero.  
Can support the auto-negotiation process, it sets bit 1.3 to logic one. (For the ICS1893CF, the default  
value of bit 1.3 is logic one.)  
7.3.11 Link Status (bit 1.2)  
The purpose of this bit 1.2 (which is also accessible through the QuickPoll Detailed Status Register, bit  
17.0) is to determine if an established link is dropped, even momentarily. To indicate a link that is:  
Valid, the ICS1893CF sets bit 1.2 to logic one.  
Invalid, the ICS1893CF clears bit 1.2 to logic zero.  
This bit is a latching low (LL) bit that the Link Monitor function controls. (For more information on latching  
high and latching low bits, see Section 7.1.4.1, “Latching High Bits” and Section 7.1.4.2, “Latching Low  
Bits”.) The Link Monitor function continually observes the data received by either its 10Base-T or  
100Base-TX Twisted-Pair Receivers to determine the link status and stores the results in the Link Status  
bit.  
The criterion the Link Monitor uses to determine if a link is valid or invalid depends on the following:  
Type of link  
Present link state (valid or invalid)  
Presence of any link errors  
Auto-negotiation process  
For more information on the Link Monitor Function (relative to the Link Status bit), see Section 6.5.5,  
“10Base-T Operation: Link Monitor”.  
ICS1893CF, Rev. F, 03/01/07  
Mar. 2007  
Copyright © 2007, Integrated Device Technology, Inc.  
All rights reserved.  
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