ICS1893CF Data Sheet - Release
Chapter 9 DC and AC Operating Conditions
9.5.8 10M Media Independent Interface: Receive Latency
Table 9-15 lists the significant time periods for the 10M MII timing. The time periods consist of timings of
signals on the following pins:
• TP_RX (that is, the MII TP_RXP and TP_RXN pins)
• RXCLK
• RXD
Figure 9-9 shows the timing diagram for the time periods.
Table 9-15. 10M MII Receive Latency
Time
Period
Parameter
Conditions Min. Typ. Max.
10M MII 6.5
Units
t1
First Bit of /5/ on TP_RX to /5/D/ on RXD
–
7
Bit times
Figure 9-9. 10M MII Receive Latency Timing Diagram
†
TP_RX
RXCLK
RXD
5
5
5
D
t1
†
Manchester
encoding is
not shown.
ICS1893CF, Rev. F, 03/01/07
Mar. 2007
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
110
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
