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ICS1892Y-14 参数 Datasheet PDF下载

ICS1892Y-14图片预览
型号: ICS1892Y-14
PDF下载: 下载PDF文件 查看货源
内容描述: 10BASE-T / 100BASE-TX集成PHYceiver [10Base-T/100Base-TX Integrated PHYceiver]
分类和应用:
文件页数/大小: 148 页 / 756 K
品牌: ICS [ INTEGRATED CIRCUIT SYSTEMS ]
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Integrated Circuit Systems, Inc.
ICS1892
10Base-T/100Base-TX Integrated PHYceiver
General
The ICS1892, an enhanced version of the ICS 1890, is a
fully integrated, physical-layer device (PHY) that is
compliant with both the 10Base-T and 100Base-TX
CSMA/CD Ethernet Standard, ISO/IEC 8802-3.
The ICS1892 incorporates digital signal processing (DSP)
in its Physical Medium Dependent (PMD) sublayer. As a
result, it can transmit and receive data on unshielded
twisted-pair (UTP) category 5 cable with attenuation in
excess of 24 dB at 100 MHz. With this ICS-patented
technology, the ICS1892 can virtually eliminate errors from
killer packets.
The ICS1892 supports a broad range of applications: data
terminal equipm ent (netwo rk in terf ace card s and
motherboards), switches, repeaters, bridges, and routers. Its
Media Independent Interface (MII) supports direct
c h i p - t o - c h i p a n d m o t h e r b o a r d - t o - d a u g h t e r b o ar d
connections as well as connections to an MII connector and
cable. The ICS1892 also provides a Serial Management
Interface for exchanging command and status information
with a Station Management (STA) entity.
The ICS1892 Media Dependent Interface (MDI) can be
configured to provide either half- or full-duplex operation at
data rates of 10 MHz or 100 MHz. The MDI configuration
can be done manually (with input pins or control register
settings) or automatically (using the Auto-Negotiation
features). When the ICS1892 Auto-Negotiation sublayer is
enabled, it exchanges technology capability data with its
remote link partner and automatically selects the
highest-performance operating mode they have in common.
ICS1892 Block Diagram
100Base-T
10/100 MII or
Alternate
MAC/Repeater
Interface
Interface
MUX
PCS
• Frame
• CRS/COL
Detection
• Parallel to Serial
• 4B/5B
PMA
• Clock Recovery
• Link Monitor
• Signal Detection
• Error Detection
Document Type:
Data Sheet
Document Stage: Released
Features
Supports category 5 cables with attenuation in excess of
24 dB at 100 MHz across a temperature range from -5° to
+85° C
DSP-based baseline wander correction to virtually
eliminate killer packets across temperature range of from
-5° to +85° C
Low-power, 0.5-micron CMOS
Single 5.0-V power supply.
Single-chip, fully integrated PHY provides PCS, PMA,
PMD, and AUTONEG sublayers of IEEE standard
10Base-T and 100Base-TX IEEE 802.3 compliant
Fully integrated, DSP-based PMD includes:
– Adaptive equalization and baseline wander correction
– Transmit wave shaping and stream cipher scrambler
– MLT-3 encoder and NRZ/NRZI encoder
Node, repeater, and switch applications
Managed and unmanaged applications
10M or 100M half- and full-duplex modes
Parallel detection
Auto-negotiation, with Next Page capabilities
Highly configurable design supports:
MAC/Repeater Interface can be configured as:
– 10M or 100M Media Independent Interface
– 100M Symbol Interface (bypasses the PCS)
– 10M 7-wire Serial Interface
Provides Loopback Modes for Diagnostic Functions
Small Footprint 64-pin Low-Profile LQFP and MQFP
packages available
TP_PMD
• MLT-3
• Stream Cipher
• Adaptive Equalizer
• Baseline Wander
Correction
Integrated
Switch
10Base-T
MII
Extended
Register
Set
Low-Jitter
Clock
Synthesizer
Clock
Power
Twisted-
Pair
Interface to
Magnetics
Modules and
RJ45
Connector
MII Serial
Management
Interface
Configuration
and Status
Auto-
Negotiation
LEDs and PHY
Address
1892 Rev. D, 2/26/01
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any information
being relied upon by the customer is current and accurate.