ICS180-53
Low EMI Clock Generator
Description
The ICS180-53 generates a low EMI output clock from
a clock or crystal input. The device uses ICS’
proprietary mix of analog and digital Phase-Locked
Loop (PLL) technology to spread the frequency
spectrum of the output, thereby reducing the frequency
amplitude peaks by several dB.
The ICS180-53 offers center spread selection of
+/-0.625% and +/-1.875%. Refer to the MK1714-01/02
for the widest selection of input frequencies and
multipliers.
ICS offers a complete line of EMI reducing clock
generators. Consult us when you need to remove
crystals and oscillators from your board.
Features
•
•
•
•
Pin and function compatible to Cypress W180-53
Packaged in 8-pin SOIC
Provides a spread spectrum output clock
Accepts a clock input and provides same frequency
dithered output
•
Input frequency of 15 to 28 MHz
•
Peak reduction by 7dB - 14dB typical on 3rd - 19th
odd harmonics
•
Spread percentage selection for +/-0.625% and
+/-1.875%
•
Operating voltage of 3.3 V and 5 V
•
Advanced, low-power CMOS process
Block Diagram
VDD
FS1
SSON#
SS%
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
CLK
X1/CLKIN
X2
Clock Buffer/
Crystal
Oscillator
GND
MDS 180-53 A
1
Revision 110404
In te grated Circui t Syste ms
l525
Ra ce Street, San Jo se, CA 9512 6
l
tel (40 8) 297-1 201
l
www.icst.co m
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
