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ICS16859C 参数 Datasheet PDF下载

ICS16859C图片预览
型号: ICS16859C
PDF下载: 下载PDF文件 查看货源
内容描述: DDR 13位至26位寄存缓冲器 [DDR 13-Bit to 26-Bit Registered Buffer]
分类和应用: 双倍数据速率
文件页数/大小: 8 页 / 93 K
品牌: ICS [ INTEGRATED CIRCUIT SYSTEMS ]
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ICSSSTV16859C
Timing Requirements
1
(over recommended operating free-air temperature range, unless otherwise noted)
V
DDQ
= 2.5V ± 0.2V
PARAMETERS
SYMBOL
MIN
MAX
Clock frequency
200
f
clock
TSSOP
1.7
2.7
t
PD
Clock to output time
VFQFN [MLF2]
1.6
2.6
t
RST
Reset to output time
3.5
t
SL
Output slew rate
1
4
0.4
Setup time, fast slew rate
2 & 4
Data before CLK↑ , CLK#↓
t
S
3&4
0.6
Setup time, slow slew rate
0.4
Hold time, fast slew rate
2 & 4
T
h
Data after CLK↑ , CLK#↓
3&4
0.5
Hold time, slow slew rate
1 - Guaranteed by design, not 100% tested in production.
Notes:
2 - For data signal input slew rate of
1V/ns.
3 - For data signal input slew rate of
0.5V/ns and < 1V/ns.
4 - CLK, CLK# signals input slew rate of
1V/ns.
UNITS
MHz
ns
ns
ns
V/ns
ns
ns
ns
ns
Switching Characteristics
(over recommended operating free-air temperature range, unless otherwise noted) (see Figure 1)
From
To
V
DD
= 2.5V ±0.2V
UNITS
SYMBOL
(Input)
(Output)
MIN
TYP
MAX
200
MHz
f
max
CLK, CLK# (TSSOP)
Q
1.7
2.3
2.7
ns
t
PD
CLK, CLK# (VFQFN[MLF2])
Q
1.6
2.1
2.6
ns
RESET#
Q
3.5
ns
t
phl
0703A—10/15/02
5