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ICS1660 参数 Datasheet PDF下载

ICS1660图片预览
型号: ICS1660
PDF下载: 下载PDF文件 查看货源
内容描述: 来电线路识别( ICLID )接收器,振铃检测 [Incoming Call Line Identification (ICLID) Receiver with Ring Detection]
分类和应用:
文件页数/大小: 7 页 / 112 K
品牌: ICS [ INTEGRATED CIRCUIT SYSTEMS ]
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ICS1660
Pin Descriptions
PIN NUMBER
DIP SO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
NAME
VDD
RING
POSTF
LFILTER
LINEAFILTER
VCOSET
LINEA
LINEB
VSS
FILTER2
FILTEROUT
AMPIN
FILTER3
LINEBFILTER
FILTER1
PWR
FSK/BAT
DESCRIPTION
Supply voltage pin to external circuits. Output of 5.0 volt regulator.
Ring detect output signal to the host microprocessor.
Post loop filter signal used by demodulator.
Loop filter for PLL.
Filter input from line “A.”
Center frequency adjustment pin.
“Tip” input from telephone line.
“Ring” input from telephone line.
Ground.
Active filter pin.
Active filter pin.
Input from active filter.
Active filter pin.
Filter input from line “B.”
Active filter pin.
Logic input signal to switch from low current standby mode.
Multiplexed output signal controlled by PWR pin. In standby mode, this is a
low battery (active low) signal. During FSK demodulation, this is the data line
to the
µP
(mark = high).
Input power supply pin.
18
10
19
20
VIN
NC on SOIC
5