欢迎访问ic37.com |
会员登录 免费注册
发布采购

ICS1531 参数 Datasheet PDF下载

ICS1531图片预览
型号: ICS1531
PDF下载: 下载PDF文件 查看货源
内容描述: 888位MSPS A / D转换器与行同步时钟发生器 [Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator]
分类和应用: 转换器时钟发生器
文件页数/大小: 76 页 / 525 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
 浏览型号ICS1531的Datasheet PDF文件第61页浏览型号ICS1531的Datasheet PDF文件第62页浏览型号ICS1531的Datasheet PDF文件第63页浏览型号ICS1531的Datasheet PDF文件第64页浏览型号ICS1531的Datasheet PDF文件第66页浏览型号ICS1531的Datasheet PDF文件第67页浏览型号ICS1531的Datasheet PDF文件第68页浏览型号ICS1531的Datasheet PDF文件第69页  
ICS1531 Data Sheet - Preliminary  
Chapter 10 Timing Diagrams  
10.1.3 Acknowledge Conditions  
Figure 10-3 shows in general how an acknowledge works on an industry-standard 2-wire serial bus.  
For start and stop conditions, see Section 10.1.1, “Start and Stop Conditions”.  
The data transfers (1). (For details, see Section 10.1.2, “Transfer of Data Bytes”.) If there is a:  
– Data read, the ICS1531 drives the data, and the master (typically, a microcontroller) drives the ACK.  
– Data write, the master drives the data, and the ICS1531 drives the ACK.  
The acknowledge bit (ACK) is the ninth (and last) bit output.  
– The ACK bit is a read-write bit that indicates whether the first 8 bits are either:  
• Read from the ICS1531 by a master device (typically, a microcontroller), or  
• Written to the ICS1531 by a master device  
– For an acknowledge (2) to occur, you must do the following:  
• Address the ICS1531 properly  
• Write a valid register index  
• Read/write the specified data  
Figure 10-3. Acknowledge on Industry-Standard 2-Wire Serial Bus  
Data Transfer  
(1)  
Acknowledge  
(2)  
Clock  
Pulse 1  
Acknowledge  
Clock Pulse  
Clock from  
Master Device  
1
2
8
9
Data Signal  
Bit 7  
(MSB)  
Bit 0  
(LSB)  
ACK  
Bit 6  
ICS1531 Rev N 12/1/99  
December, 1999  
Copyright © 1999, Integrated Circuit Systems, Inc.  
All rights reserved.  
65  
 复制成功!