ICS9248-131
Byte 3: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
28
29
31
32
34
35
37
38
PWD
1
1
1
1
1
1
1
1
Description
SDRAM7 (Act/Inact)
SDRAM6 (Act/Inact)
SDRAM5 (Act/Inact)
SDRAM4 (Act/Inact)
SDRAM3 (Act/Inact)
SDRAM2 (Act/Inact)
SDRAM1 (Act/Inact)
SDRAM0 (Act/Inact)
Byte 4: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
25
-
-
-
17
18
20
21
PWD
1
1
1
1
1
1
1
1
Description
AGP_F (Active/Inactive)
(Reserved)
(Reserved)
(Reserved)
SDRAM11 (Act/Inact)
(Desktop Mode Only)
SDRAM10 (Act/Inact)
(Desktop Mode Only)
SDRAM9 (Act/Inact)
SDRAM8 (Act/Inact)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 5: Peripheral Active/Inactive Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
47
-
-
46
2
PWD
1
1
1
1
1
X
1
1
Description
(Reserved)
(Reserved)
(Reserved)
AGP0 (Act/Inact)
(Reserved)
MODE
AGP1 (Act/Inact)
REF0 (Act/Inact)
Byte 6: Optional Register for Possible
Furture Requirements
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
-
-
-
PWD
1
1
1
1
1
1
1
1
Description
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
Notes:
1. Byte 6 is reserved by Integrated Circuit Systems for futue
applications.
5
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
