AV9154A
Pin Configuration
16-Pin PDIP or SOIC
AV9154A-27
16-Pin PDIP or SOIC
AV9154A-42
Description of new pin:
SLOWCLK# forces 2XCPUCLK
output to ramp smoothly to
8MHz and CPUCLK output to 4
MHz when pulled low.
16-Pin PDIP or SOIC
AV9154A-43
Description of new pis:
SLOWCLK# forces 2XCPUCLK
output to ramp smoothly to
8MHz when pulled low.
STOPCLK# provides gilitch-
free stop of the 2XCPUCLK
output when pulled low. When
raised
back
high,
the
2XCPUCLK output clock
resumes full speed operation
(no clock frequency ramp up
since the internal VCO is not
stopped).
16-Pin PDIP or SOIC
9154-04
16-Pin PDIP or SOIC
9154-10
16-Pin PDIP or SOIC
9154-26
2
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
