ICS83026I-01
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
SCHEMATIC EXAMPLE
LVCMOS drivers. In this example, series termination approach
is shown. Additional termination approaches are shown in the
LVCMOSTermination Application Note.
Figure 3 shows an application schematic example of ICS83026I-
01. The ICS83026I-01 CLK/nCLK input can directly accepts
various types of differential signal. In this example, the input is
driven by an LVDS driver. The ICS83026I-01 outputs are
VDD
3.3V
R3
1K
VDD
VDDO
Zo = 50 Ohm
1
2
3
4
8
7
6
5
R1
43
VDD
CLK
nCLK
OE
VDDO
Q0
Q1
Zo = 50 Ohm
GND
R4
100
LVCMOS
C2
0.1u
LVDS
U1
ICS83026I-01
C1
Zo = 50 Ohm
0.1u
Zo = 50 Ohm
VDD=3.3V
VDDO= 3.3V, 2.5V or 1.8V
R2
43
LVCMOS
FIGURE 3. ICS83026I-01 SCHEMATIC EXAMPLE
RELIABILITY INFORMATION
TABLE 5A. θJAVS. AIR FLOW TABLE FOR 8 LEAD SOIC
θ
JA by Velocity (Linear Feet per Minute)
0
200
128.5°C/W
103.3°C/W
500
115.5°C/W
97.1°C/W
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
153.3°C/W
112.7°C/W
NOTE: Most modern PCB designs use multi-layered boards.The data in the second row pertains to most designs.
TABLE5B. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θ
JA by Velocity (Linear Feet per Minute)
0
200
90.5°C/W
500
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
TRANSISTOR COUNT
The transistor count for ICS83026I-0I is: 260
83026BMI-01
www.icst.com/products/hiperclocks.html
REV.A JANUARY 16, 2006
11
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
