Integrated
Circuit
Systems, Inc.
ICS843011
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
106.25MHz output frequency. The C1 = 27pF and C2 = 33pF
are recommended for frequency accuracy. For different board
layout, the C1 and C2 values may be slightly adjusted for opti-
mizing frequency accuracy.
A
PPLICATION
S
CHEMATIC
Figure 3A
shows a schematic example of the ICS843011. An
example of LVEPCL termination is shown in this schematic.
Additional LVPECL termination approaches are shown in the
LVPECL Termination Application Note. In this example, an 18 pF
parallel resonant 26.5625MHz crystal is used for generating
VCC
VCCA
VCC
R2
10
C3
10uF
C4
0.01u
R3
133
R5
133
U1
Q
Zo = 50 Ohm
VCCA
VEE
XTAL_OUT
XTAL_IN
VCC
Q0
nQ0
NC
1
2
3
4
8
7
6
5
VCC
+
Zo = 50 Ohm
nQ
C2
33pF
18pF
X1
-
ICS843011
C5
0.1u
R4
82.5
R6
82.5
C1
22pF
VCC=3.3V
F
IGURE
3A. ICS843011 S
CHEMATIC
E
XAMPLE
PC B
OARD
L
AYOUT
E
XAMPLE
Figure 3B
shows an example of ICS843011 P.C. board layout.
The crystal X1 footprint shown in this example allows installa-
tion of either surface mount HC49S or through-hole HC49 pack-
age. The footprints of other components in this example are listed
in the
Table 6.
There should be at least one decoupling capacitor
per power pin. The decoupling capacitors should be located as
close as possible to the power pins. The layout assumes that
the board has clean analog power ground plane.
T
ABLE
6. F
OOTPRINT
T
ABLE
Reference
C1, C2
C3
C4, C5
Size
0402
0805
0603
R2
0603
NOTE: Table 6, lists component
sizes shown in this layout example.
F
IGURE
3B. ICS843011 PC B
OARD
L
AYOUT
E
XAMPLE
843011AG
www.icst.com/products/hiperclocks.html
7
REV. B DECEMBER 10, 2004
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
