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X24C01MI 参数 Datasheet PDF下载

X24C01MI图片预览
型号: X24C01MI
PDF下载: 下载PDF文件 查看货源
内容描述: 串行E2PROM [Serial E2PROM]
分类和应用: 内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 14 页 / 275 K
品牌: ICMIC [ IC MICROSYSTEMS ]
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X24C01  
The data output is sequential, with the data from address  
n followed by the data from n + 1. The address counter  
Sequential Read  
Sequential read is initiated in the same manner as the  
byte read. The first data byte is transmitted as with the  
for read operations increments all address bits, allowing  
the entire memory contents to be serially read during  
byte read mode, however, the master now responds  
with an acknowledge, indicating it requires additional  
one operation. At the end of the address space (address  
127) the counter “rolls over” to zero and the X24C01  
data. The X24C01 continues to output data for each  
acknowledge received. The read operation is termi-  
continues to output data for each acknowledge re-  
ceived. Refer to Figure 8 for the address, acknowledge  
and data transfer sequence.  
nated by the master; by not responding with an acknowl-  
edge and by issuing a stop condition.  
Figure 8. Sequential Read  
S
A
C
K
A
C
K
A
C
K
T
BUS ACTIVITY: ADDRESS  
O
P
SDA LINE  
P
A
R
BUS ACTIVITY:  
X24C01  
C
/
DATA n  
DATA n+1  
DATA n+2  
DATA n+x  
K
W
3837 FHD F13  
Figure 9. Typical System Configuration  
V
CC  
PULL-UP  
RESISTORS  
SDA  
SCL  
MASTER  
SLAVE  
SLAVE  
TRANSMITTER/  
RECEIVER  
MASTER  
TRANSMITTER/  
RECEIVER  
MASTER  
TRANSMITTER  
TRANSMITTER/  
RECEIVER  
RECEIVER  
3837 FHD F14  
7