X24320
Bus Timing
t
t
t
t
HIGH
LOW
R
F
SCL
t
t
t
t
t
SU:STA
HD:STA
HD:DAT
SU:DAT
SU:STO
SDA IN
t
t
t
AA
DH
BUF
SDA OUT
7035 FM 14
Write Cycle Limits
Symbol
(5)
Parameter
Min.
Typ.
Max.
Units
ms
(6)
tWC
Write Cycle Time
5
10
7003 FRM T11
Notes: (5)Typical values are for TA = 25°C and nominal supply voltage (5V).
(6)tWR is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/write cycle.
During the write cycle, the X24320 bus interface circuits are disabled, SDA is allowed to remain HIGH, and the device does
not respond to its slave address.
Bus Timing
SCL
ACK
SDA
8th BIT
WORD n
t
WC
STOP
CONDITION
START
CONDITION
7035 FM 15
SYMBOL TABLE
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
WAVEFORM
INPUTS
OUTPUTS
120
V
Must be
steady
Will be
steady
CC MAX
R
=
=1.8KΟ
MIN
I
100
80
OL MIN
t
R
May change
from Low to
High
Will change
from Low to
High
R
=
MAX
C
BUS
MAX.
RESISTANCE
60
40
20
0
May change
from High to
Low
Will change
from High to
Low
MIN.
RESISTANCE
Changing:
State Not
Known
Don’t Care:
Changes
Allowed
20 40 60 80
0
100120
Center Line
is High
Impedance
N/A
BUS CAPACITANCE (pF)
7035 FM 16
7035 FM 17
13
ICMIC [ IC MICROSYSTEMS ]
