欢迎访问ic37.com |
会员登录 免费注册
发布采购

IC-WDEVALWD2D 参数 Datasheet PDF下载

IC-WDEVALWD2D图片预览
型号: IC-WDEVALWD2D
PDF下载: 下载PDF文件 查看货源
内容描述: 开关式双电压稳压器 [SWITCHED-MODE DUAL VOLTAGE REGULATOR]
分类和应用: 稳压器开关
文件页数/大小: 12 页 / 591 K
品牌: ICHAUS [ IC-HAUS GMBH ]
 浏览型号IC-WDEVALWD2D的Datasheet PDF文件第1页浏览型号IC-WDEVALWD2D的Datasheet PDF文件第3页浏览型号IC-WDEVALWD2D的Datasheet PDF文件第4页浏览型号IC-WDEVALWD2D的Datasheet PDF文件第5页浏览型号IC-WDEVALWD2D的Datasheet PDF文件第6页浏览型号IC-WDEVALWD2D的Datasheet PDF文件第7页浏览型号IC-WDEVALWD2D的Datasheet PDF文件第8页浏览型号IC-WDEVALWD2D的Datasheet PDF文件第9页  
iC-WD
A/B/C
SWITCHED-MODE DUAL VOLTAGE REGULATOR
Rev D1, Page 2/12
DESCRIPTION
The device iC-WD is a monolithic switching regula-
tor with two downstream 5 V resp. 3.3 V linear reg-
ulators. In view of the high efficiency of the down
converter for an input voltage range of 8 to 36 V, the
iC-WD family is well-suited for industrial applications
which require a stabilised 5 V resp. 3.3 V power sup-
ply with minimal power dissipation and few compo-
nents.
Switching transistor, free-wheeling diode and oscil-
lator are integrated, limiting the necessary external
elements for the switching regulator to the inductor,
the back-up capacitor and one resistor. This resistor
determines the regulator’s cut-off current and thus its
efficiency in the particular application at hand.
The downstream linear regulators feature a low resid-
ual ripple even with relatively small smoothing capac-
itors in the µF range. The output voltages have an
internal reference and are specified ±5% in the en-
tire operating and temperature range. The use of two
mutually independent linear regulators makes it pos-
sible to isolate the voltage supply of sensitive ana-
logue circuits or sensors from the supply for digital
and driver devices.
The chip temperature and the output voltages are
monitored. A fault is signalled via the current-limited
open-collector output NER, for example by an LED
display or a logical link with other error signals from
the system. In the event of overtemperature, the
switching regulator is disabled to reduce the power
dissipation of the chip.
PACKAGES
SO8, SO8tp, DFN10 to JEDEC Standard
PIN CONFIGURATION SO8, SO8tp
(top view)
1
8
PIN FUNCTIONS
No. Name Function
VB
NER
2
7
VBR
3
VCCA
6
VHL
4
VCC
5
GND
VH
1
2
3
4
5
6
7
8
NER
VBR
VHL
GND
VH
VCC
VCCA
VB
Error Output
Pin for shunt
Pin for inductor
Ground (reference voltage)
Intermediate Voltage
Output (200 mA)
Output (25 mA)
Supply Voltage
The
Thermal Pad
(optional) is to be connected to a Ground Plane on the PCB.
PIN CONFIGURATION DFN10
(top view)
PIN FUNCTIONS
No. Name Function
1
2
3
4
5
6
7
8
9
10
NER
n.c.
VBR
VHL
GND
GND
VH
VCC
VCCA
VB
Error Output
Pin for shunt
Pin for inductor
Ground (reference voltage)
Ground (reference voltage)
Intermediate Voltage
Output (200 mA)
Output (25 mA)
Supply Voltage
iC−WD Code...
...
...yyww
1
10
2
9
3
iC−WDx
...
...yyww
8
4
7
5
6
The
Thermal Pad
is to be connected to a Ground Plane on the PCB.
Orientation of the package label (
WDx ...yyww)
may vary.