iC-VRV
BIDIRECTIONAL µP INTERFACE TO 24V
Rev A2, Page 6/12
Control Word 2
higher nibble
lower nibble
Bit
7
6
5
4
3
2
1
0
Name
NIOH
TSTH
IBH
not used
NIOL
TSTL
IBL
EOI
Control Word 2 (lower nibble)
Interrupt
Bit 0
(EOI)
0
1
Interrupt is not cancelled
Clearing Interrupt
Current Sources at I/O Pins
Bit 1
(IBL)
0
1
Pull-Down Current 200 µA
Pull-Down Current 2 mA
Test
Bit 2
(TSTL)
0
1
Feedback of I/O stages active (OR gated with test pattern)
Test pattern activated, feedback of I/O stages switched off
Input/Output Mode
Bit 3
(NIOL)
0
1
Input Mode
Output Mode
Control Word 2 (higher nibble)
Bit 4 not used
Current Source at I/O Pins
-
Bit 5
(IBH)
0
1
Pull-Down Current 200 µA
Pull-Down Current 2 mA
Test
Bit 6
(TSTH)
0
1
Feedback of I/O stages active (OR gated with test pattern)
Test pattern activated, feedback of I/O stages switched off
Input/Output Mode
Bit 7
(NIOH)
0
1
Input Mode
Output Mode
ICHAUS [ IC-HAUS GMBH ]
