iC-TW4 PROGRAMMABLE INTERPOLATOR
WITH AUTOMATIC OFFSET CORRECTION
Rev D1, Page 8/14
CONFIGURATION
The iC-TW4 is configured by applying the appropriate Interpolation
voltage and impedance on its configuration pins CFG1 The interpolation factor is configured through pin
and CFG2. A two-resistor voltage divider is sufficient CFG1. The recommended resister values shown in
to generate the required configuration voltage. The re- Table 6 should be used.
sistor divider must be connected to VDD and GND of
iC-TW4. The resistors should be placed as close as
possible to pin CFG1 and CFG2 and no decoupling ca-
pacitor should be used. The resistors tolerance must
be 1 % to guarantee reliable operation across all para-
metric corners.
IPF(Interpolation) Hysteresis [V] at CFG1 R1 [kΩ ] R2 [kΩ
]
x2 (8)
x2 (8)
x4 (16)
x4 (16)
x5 (20)
x5 (20)
x8 (32)
x8 (32)
x10 (40)
x10 (40)
x16 (64)
x16 (64)
x20 (80)
x20 (80)
x25 (100)
x25 (100)
x32 (128)
x32 (128)
x50 (200)
x50 (200)
x64 (256)
x64 (256)
10.4 °
15.6 °
10.4 °
15.6 °
10.4 °
15.6 °
10.4 °
15.6 °
5.6 °
10.4 °
5.6 °
10.4 °
2.8 °
5.6 °
2.8 °
5.6 °
2.8 °
5.6 °
2.8 °
5.6 °
2.8 °
0.13 * VDD 22.6
0.13 * VDD 562
3.48
86.6
3.74
93.1
4.12
102
4.53
113
4.99
124
5.62
140
6.49
162
7.50
187
8.87
226
0.2 * VDD
0.2 * VDD
15.0
374
0.27 * VDD 11.3
0.27 * VDD 280
0.33 * VDD 8.87
0.33 * VDD 226
The configuration applied to pins CFG0 and CFG1 is
not permitted to change during operation or unpre-
dictable behaviour can result. In order to change the
configuration a Power-On-Reset (POR) must be exe-
cuted (power cycling).
0.4 * VDD
0.4 * VDD
7.50
187
0.46 * VDD 6.49
0.46 * VDD 162
0.54 * VDD 5.62
0.54 * VDD 140
VDD
0.6 * VDD
0.6 * VDD
4.99
124
R1
CFG1
0.67 * VDD 4.53
0.67 * VDD 113
0.73 * VDD 4.12
0.73 * VDD 102
R2
11.3
280
15.0
15.0
iC-TW4
CFG2
VDD
Don't use
decoupling capacitors
0.8 * VDD
0.8 * VDD
3.74
93.1
R3
5.6 °
R4
Table 6: Interpolation configuration
Use 1% resistors and
place as close as possible
to pin CFG1/CFG2
Figure 3: Configuration
ICHAUS [ IC-HAUS GMBH ]
