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IC-TW2 参数 Datasheet PDF下载

IC-TW2图片预览
型号: IC-TW2
PDF下载: 下载PDF文件 查看货源
内容描述: 8 - BIT单/集成了EEPROM COS插值IC [8-BIT SIN/COS INTERPOLATION IC WITH INTEGRATED EEPROM]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 30 页 / 459 K
品牌: ICHAUS [ IC-HAUS GMBH ]
 浏览型号IC-TW2的Datasheet PDF文件第7页浏览型号IC-TW2的Datasheet PDF文件第8页浏览型号IC-TW2的Datasheet PDF文件第9页浏览型号IC-TW2的Datasheet PDF文件第10页浏览型号IC-TW2的Datasheet PDF文件第12页浏览型号IC-TW2的Datasheet PDF文件第13页浏览型号IC-TW2的Datasheet PDF文件第14页浏览型号IC-TW2的Datasheet PDF文件第15页  
iC-TW2 8-BIT SIN/COS INTERPOLATION IC  
WITH INTEGRATED EEPROM  
Rev D3, Page 11/30  
INPUT STAGE  
OFSA(5:0)  
Addr. 0x08; bit 5:0  
Addr. 0x09; bit 5:0  
R/W  
R/W  
A programmable gain amplifier (PGA) with output re-  
ferred offset adjustment is used as input stage, shown  
OFSB(5:0)  
Code  
Function, defaults to eeprom setting  
in Figure 3. The coarse gain is common for both  
channel A and B and is programmed through regis-  
ter GC(2:0). Table 5 shows the required gain setting  
for a given input signal amplitude (peak to peak, differ-  
ential). Fine tuning gain is applied individually to chan-  
nel A and B by programming registers GFA(1:0) and  
GFB(1:0) respectively.  
111111  
111110  
100001  
100000  
000000  
000001  
011110  
011111  
maximum negative adjust: -403 mV  
-390 mV  
-13 mV  
no correction  
no correction  
13 mV  
390 mV  
maximum positive adjust: 403 mV  
GC(2:0)  
Code  
000  
Addr. 0x07; bit 2:0  
Function, defaults to eeprom setting  
1.5 V - 800 mV  
R/W  
Table 7: Offset control of channel A/B  
001  
800 mV - 400 mV  
400 mV - 200 mV  
200 mV - 100 mV  
100 mV - 50 mV  
Consider Table 8 regarding the relationship between  
input signal peak-peak differential amplitude, amplifier  
gain setting and resulting offset correction range.  
010  
011  
100  
101  
50 mV - 25 mV  
Input amplifier gain and offset  
110  
25 mV - 10 mV  
Input signal range  
Register  
GC(2:0)  
Input  
referred  
Input  
referred  
111  
not defined  
offset step offset  
size  
range  
Table 5: Coarse gain control of channel A/B  
800 mV - 1.5 V  
400 mV - 800 mV  
200 mV - 400 mV  
100 mV - 200 mV  
50 mV - 100 mV  
25 mV - 50 mV  
10 mV - 25 mV  
0
1
2
3
4
5
6
26 mV  
±806 mV  
±403 mV  
±202 mV  
±101 mV  
±50 mV  
±25 mV  
±12.6 mV  
13 mV  
6.5 mV  
3.25 mV  
1.63 mV  
0.81 mV  
0.41 mV  
GFA(1:0)  
Addr. 0x07; bit 4:3  
R/W  
R/W  
GFB(1:0)  
Code  
00  
Addr. 0x07; bit 6:5  
Function, defaults to eeprom setting  
0 dB  
01  
0.7 dB  
1.4 dB  
2.1 dB  
10  
Table 8: Input amplifier gain and offset  
11  
Input  
Table 6: Fine gain control of channel A/B  
amplifier  
OFSB(5:0)  
GFB(1:0)  
+
-
PINB  
NINB  
Xb  
+
Offset adjustment is provided at the output of the input  
amplifier. It is individually programmed through regis-  
ter OFSA(5:0) and OFSB(5:0). Adjustment is made in  
steps of 13 mV and the corresponding register values  
are sign magnitude encoded. Input referred offset be-  
comes gain dependent and is defined as follows:  
GC(2:0)  
to interpolation  
engine  
+
-
PINA  
NINA  
Xa  
+
GFA(1:0)  
OFSA(5:0)  
13 mV OFSA(5 : 0)  
=
Figure 3: Input stage  
OFSAinput_referred  
GC(2 : 0)