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IC-NZPEVALNZP1D 参数 Datasheet PDF下载

IC-NZPEVALNZP1D图片预览
型号: IC-NZPEVALNZP1D
PDF下载: 下载PDF文件 查看货源
内容描述: P型激光二极管驱动器 [P-TYPE LASER DIODE DRIVER]
分类和应用: 驱动器二极管激光二极管
文件页数/大小: 13 页 / 417 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-NZP  
P-TYPE LASER DIODE DRIVER  
Rev A1, Page 11/13  
External capacitor mode  
low monitor current. In that cases, an external capaci-  
In applications where an external capacitor is required tor is to be connected as close as possible to the chip,  
(see best performance recommendations below), the across pin CI and CIS. This will prevent instability of  
external capacitor mode must be enabled (NCID pin the control circuit. For averaging control a 10 nF ca-  
set to low).  
pacitor at CI is recommended. Special care must be  
taken in PCB layout when laying out the path from the  
laser diode’s cathode to GND. This path must be kept  
Best performance recommendations  
The operating point for the laser diode is stored in an as short as possible to avoid parasitic inductances. A  
on-chip capacitor. This permits a fast start-up but can snubber network across the laser diode also helps to  
lead to an unstable control circuit under certain condi- compensate for these parasitic inductances.  
tions such as inadequate PCB layout or laser with very  
RVDD  
+3..+5.5V  
VDDA  
VDD  
RSI  
i(RSI)x540  
CVDDA  
100 nF..  
CVDD  
100 nF..  
LDA MONITOR  
iC-NZP  
VDDL  
CIS  
RSI  
NSLP  
REGE  
VDD  
0.68..9kΩ  
&
1
AVG  
&
ECI  
..10 nF..  
CI  
VSY  
SYN  
-
CI  
x280  
REF  
LVDS/TTL  
EP  
+
+
-
LDA  
IMON  
MD  
EN  
VDD  
VDD  
..300mA  
TTL  
NCID  
ECI  
OUTPUT DRIVER  
INPUT INTERFACE  
OverTemp.  
RMD  
PMD  
NERR  
OverCurrent  
Low V(LDA)  
1
Bandgap, Reference, Overtemp  
OUTPUT MONITOR  
T.PAD  
GND  
RGND  
GND  
Figure 7: Example set-up for current control  
SLEEP MODE  
The iC-NZP has a very low consuption mode that per- where the VDDA pin is disconnected as supply and  
mits hibernation in battery powered applications. Set- pulled down. The wake up from sleep time is about  
ting the NSLP pin to low drives the chip into a state 300 µs