iC-NV
6-BIT Sin/D FLASH CONVERTER
Rev C1, Page 8/19
A/B OUTPUT PHASE SELECTION
ROT
lo
lo
open
open
hi
hi
Input signals
positive; COS leading SIN
negative; SIN leading COS
positive; COS leading SIN
negative; SIN leading COS
positive; COS leading SIN
negative; SIN leading COS
Output signals A, B; Z
B leading A; Z
A leading B; Z
B leading A; MSB
A leading B; MSB
A leading B; Z
B leading A; Z
Resolution, frequency ranges
Nine different resolutions or interpolation factors (IPF) can be programmed via inputs SF0 and SF1. Resolutions
16, 12 and 10 are generated at the core of the converter itself. Resolutions of less than 10 are produced by
division DIV in the digital processing unit. The minimum transition distance at outputs A and B corresponds to that
of the transition distance control multiplied by the divisor of the digital processing unit.
The minimum output transition distance (maximum output frequency) should be adjusted to tarry with the overall
system (bandwidth of the transfer medium, sampling rate of the counter). The maximum input frequency is
determined by the transition distance control and the resolution of the converter core (16, 12 or 10). This
frequency can be increased for resolutions of less than 10 with an external resistor at RCLK. The following table
gives possible settings.
RESOLUTION
SF1
SF0
IPF
DIV
internal
division
1
1
1
2
2
4
4
8
16
fin
MAX
fin
MAX
for RCLK= VCC
or RCLK= 47 kΩ
200 kHz
260 kHz
320 kHz
200 kHz
320 kHz
200 kHz
260 kHz
200 kHz
200 kHz
hi
hi
hi
open
open
open
lo
lo
lo
hi
open
lo
hi
open
lo
hi
open
lo
16
12
10
8
5
4
3
2
1
200 kHz, RCLK= 47 kΩ
260 kHz, RCLK= 47 kΩ
320 kHz, RCLK= 47 kΩ
400 kHz, RCLK= 23 kΩ
640 kHz, RCLK= 23 kΩ
800 kHz, RCLK= 12 kΩ
1.04 MHz, RCLK= 12 kΩ
1.6 MHz, RCLK= 6 kΩ
(3.2 MHz), RCLK= 3 kΩ
ICHAUS [ IC-HAUS GMBH ]
