iC-NQC
13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
Rev B1, Page 24/29
EEPROM INTERFACE
Register Configuration
The serial EEPROM interface consists of the two pins
BiSS Adr
hex
BiSS Adr
decimal
Contents
SCL and SDA and enables read and write access to
a serial EEPROM with I2C interface (such as a 24C02
with 128 bytes, 5 V type with a 3.3 V function).
0x00...0F
0x10...1F
0x20...3F
0...15
Config. Data RAM (16 bytes)
Config. Data EEPROM (16 bytes)
Unused memory area (32 bytes)
16...31
32...63
The configuration data in the EEPROM, of addresses
0x00 to 0x0F, is secured by a CRC check value to ad-
dress 0x0F. When the device is powered up, the ad-
dress range from 0x00 to 0x0F is mapped onto iC-
NQC’s configuration RAM. The higher memory area
contains BiSS C slave registers and optional memory
banks available to the sensor system.
BiSS C Slave-Registers (direct addresses):
0x40
64
Bank Select (1 byte)
EDS Bank (1 byte)
Profile ID (2 bytes)
Serial No. (4 bytes)
Slave Registers (48 bytes)
Device ID (6 bytes):
4E (default)
0x41
65
0x42...43
0x44...47
0x48...77
66...67
68...71
72...119
0x78
0x79
0x7A
0x7B
0x7C
0x7D
120
121
122
123
124
125
The register access to the configuration data and the
memory banks 1 to 7 (intended for EDS) can be re-
stricted by parameter RPL.
51 (default)
43 (default)
31 (default)
Bit 7:3: Adr 0x00, Bit 2:0: TOS
00 (default)
Example of CRC Calculation Routine
Manufacturer’s ID (2 bytes):
69 (default)
unsigned char ucDataStream
int iCRCPoly 0x127 ;
unsigned char ucCRC=0;
int 0;
= 0;
=
0x7E
0x7F
126
127
43 (default)
i
=
ucCRC = 0; / / s t a r t value ! ! !
Table 51: Register overview
for ( iReg
= 0; iReg <15; iReg ++)
{
ucDataStream
for ( i =0; i <=7; i ++)
i f ( (ucCRC & 0x80 ) != ( ucDataStream & 0x80 ) )
ucCRC = (ucCRC << 1) iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream ucDataStream << 1;
= ucGetValue ( iReg ) ;
RPL
Adr 0x03, Bit 3
{
Code
Bank 0
0x40..7F
Bank 1..7
EDS
Bank 8..15
User Data
^
Config. Dat. BiSS ID
0x0
read /
write
read /
write
read /
write
read /
write
=
}
0x1
-
read*
read
read /
write
}
Notes
*) Exception: write to 0x40 and 0x7C is always
possible.
CRC_E2P Adr 0x0F, Bit 7:0
Code
0x00
...
Description
Table 52: Register protection settings
Check value formed by CRC polynomial 0x127
0xFF
Table 50: Check value for EEPROM data
ICHAUS [ IC-HAUS GMBH ]
