iC-NQC
13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
Rev D1, Page 10/29
PARAMETER and REGISTER
Signal Monitoring
and Error Messages . . . . . . . . . . . . . . . . . . . . . . . Page 17
SELAMPL: Amplitude Monitoring, function
Register Description, Overview . . . . . . . . . . . Page 10
Signal Conditioning . . . . . . . . . . . . . . . . . . . . . . . Page 11
GAIN:
Gain Select
AMPL:
AERR:
FERR:
Amplitude Monitoring, thresholds
Amplitude Error
Frequency Error
SINOFFS:
Offset Calibration Sine
COSOFFS: Offset Calibration Cosine
REFOFFS: Offset Calibration Reference
RATIO:
PHASE:
Amplitude Calibration
Phase Calibration
Test Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 18
TMODE:
TMA:
Test Mode
Analog Test Mode
Converter Function . . . . . . . . . . . . . . . . . . . . . . . . Page 12
SELRES:
HYS:
FCTR:
Resolution
Hysteresis
Max. Permissible Converter Frequency
BiSS Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 19
SELSSI: Protocol Version
TIMO, TOA: Timeout
Incremental Signals . . . . . . . . . . . . . . . . . . . . . . . Page 15
CFGABZ:
ROT:
TOS:
Timeout Short**
Output A, B, Z
Direction of Rotation
24-bit Period Counter Configuration
M2S:
CRC6:
NZB:
Data Output and Options
CRC Polynomial
Zero Bit
CBZ:
ENRESDEL: Output Delay A, B, Z
ENCDS:
RPL:
GRAY:
Protocol Options
Register Protection Settings
SSI Data Format
ZPOS:
CFGZ:
CFGAB:
Zero Signal Position
Zero Signal Length
Zero Signal Logic
OVERVIEW
Adr
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
AERR
Bit 0
ENCDS
M2S(1:0)
SELRES(4:0)
HYS(2:0)
SELSSI
NZB
ZPOS(4:0)
ENRESDEL
CRC6
ROT
CBZ
CFGABZ(1:0)
RPL
CFGZ(1:0)
CFGAB(1:0)
0
FERR
FCTR(7:0)
GRAY
FCTR(14:8)
TOA
reserved*
TIMO
reserved*
GAIN(3:0)
0
TMODE(2:0)
TMA
reserved*
RATIO(3:0)
SINOFFS(7:0)
COSOFFS(7:0)
PHASE(5:0)
reserved*
REFOFFS
RATIO(4)
SELAMPL
AMPL(1:0)
CRC_E2P(7:0) - check value read from the EEPROM for addresses 0x00 to 0x0E
Reserved EEPROM memory section: iC-NQC device configuration data.
EEPROM
0x10 -
0x1F
0x00 - 0x0F
0x41 -
0x7F
0x31 - 0x6F
Reserved EEPROM memory section: BiSS C Slave Registers (device identifier 4E 51 43 35 00 00 69 43)
Register contents are random when powering up without an EEPROM.
When no register protection is active, all registers permit read and write access (see RPL).
*) Reserved registers must be programmed to zero. **) For TOS see table 42 on page 21.
Table 5: Register layout
ICHAUS [ IC-HAUS GMBH ]
