欢迎访问ic37.com |
会员登录 免费注册
发布采购

IC-MSBTSSOP20-TP 参数 Datasheet PDF下载

IC-MSBTSSOP20-TP图片预览
型号: IC-MSBTSSOP20-TP
PDF下载: 下载PDF文件 查看货源
内容描述: SIN / COS信号调理与1Vpp典型DRIVER [SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER]
分类和应用: 驱动
文件页数/大小: 29 页 / 584 K
品牌: ICHAUS [ IC-HAUS GMBH ]
 浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第6页浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第7页浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第8页浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第9页浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第11页浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第12页浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第13页浏览型号IC-MSBTSSOP20-TP的Datasheet PDF文件第14页  
iC-MSBSAFETY, iC-MSB2  
SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER  
Rev D2, Page 10/29  
PROGRAMMING  
Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 11 Signal Conditioning CH1, CH2 (X3...X6) . . Page 21  
GR12:  
GF1:  
Gain Range CH1, CH2 (coarse)  
Gain Factor CH1 (fine)  
GF2:  
Gain Factor CH2 (fine)  
Configuration Interface . . . . . . . . . . . . . . . . . . . Page 13  
ENFAST:  
ENSL:  
I2C Fast Mode Enable  
VOS12:  
VDC1:  
VDC2:  
OR1:  
OF1:  
OR2:  
Offset Reference Source CH1, CH2  
Intermediate Voltage CH1  
Intermediate Voltage CH2  
Offset Range CH1 (coarse)  
Offset Factor CH1 (fine)  
Offset Range CH2 (coarse)  
Offset Factor CH2 (fine)  
Phase Correction CH1 vs. CH2  
I2C Slave Mode Enable  
DEVID:  
Device ID of EEPROM providing the  
chip configuration data (e.g. 0x50)  
CRC of chip configuration data  
(address range 0x00 to 0x1E)  
Chip Release  
CHKSUM:  
OF2:  
PH12:  
CHPREL:  
NTRI:  
Tristate Function and  
Op. Mode Change  
Signal Conditioning CH0 (X1, X2) . . . . . . . . . Page 23  
GR0:  
GF0:  
VOS0:  
OR0:  
OF0:  
Gain Range CH0 (coarse)  
Gain Factor CH0 (fine)  
Offset Reference Source CH0  
Offset Range CH0 (coarse)  
Offset Factor CH0 (fine)  
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 15  
CFGIBN:  
CFGTA:  
Bias Calibration  
Temperature Sensor Calibration  
Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . Page 16  
MODE:  
ENF:  
Operation Mode  
Signal Filtering  
Signal Level Controller . . . . . . . . . . . . . . . . . . . . Page 24  
ADJ: Setup of ACO Output Function  
Test Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Seite 17  
TMODE:  
TMEM:  
Test Mode Functions  
Test Mode Memory Selection  
Error Monitoring and Alarm Output . . . . . . Page 25  
EMTD:  
EPH:  
Minimal Alarm Indication Time  
Alarm Input/Output Logic  
Input Configuration and  
Signal Path Multiplexer . . . . . . . . . . . . . . . . . . . Page 18  
INMODE:  
RIN12:  
EPU:  
EMASKA:  
Alarm Output Pull-Up Enable  
Error Mask For Alarm Indication (pin  
ERR)  
Diff./Single-Ended Input Mode  
I/V Mode and Input Resistance CH1,  
CH2  
Reference Voltage CH1, CH2  
I/V Mode and Input Resistance CH0  
Reference Voltage CH0  
EMASKE:  
EMASKO:  
Error Mask For Protocol (EEPROM)  
Error Mask For Driver Shutdown  
BIAS12:  
RIN0:  
BIAS0:  
MUXIN:  
ERR1:  
ERR2:  
ERR3:  
Error Protocol: First Error  
Error Protocol: Last Error  
Error Protocol: History  
Input-To-Channel Assignment:  
X3...X6 to CH1, CH2  
INVZ:  
EAZ:  
MUXOUT:  
BIASEX:  
BYP  
Index Signal Inversion  
PDMODE:  
Driver Activation After Cycling Power  
Index Comparator Enable  
Output Multiplexer (iC-MSB2 only)  
Input Reference Selection  
Input-to-output Feedthrough